MCF5207 FREESCALE [Freescale Semiconductor, Inc], MCF5207 Datasheet - Page 27

• Manufacturer Part Number: MCF5207
• Description: Microprocessor Data Sheet
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

5.7
The SDRAM controller supports accesses to main SDRAM memory from any internal master. It supports
either standard SDRAM or double data rate (DDR) SDRAM, but it does not support both at the same time.
The SDRAM controller uses SSTL2 and SSTL3 I/O drivers. Both SSTL drive modes are programmable
for either Class I or Class II drive strength.
5.7.1
The following timing numbers indicate when data will be latched or driven onto the external bus, relative
to the memory bus clock, when operating in SDR mode on write cycles and relative to SD_DQS on read
cycles. The SDRAM controller is a DDR controller that has an SDR mode. Because it is designed to
support DDR, a DQS pulse must still be supplied to the device for each data beat of an SDR read. The
ColdFire processor accomplishes this by asserting a signal called SD_DQS during read cycles. Care must
be taken during board design to adhere to the following guidelines and specs with regard to the SDR_DQS
signal and its usage.
Freescale Semiconductor
FB_CSn, BE/BWEn
SDRAM Bus
SDR SDRAM AC Timing Characteristics
FB_CLK
D[31:0]
A[23:0]
R/W
OE
TA
TS
MCF5208 ColdFire
Figure 15. Flexbus Write Timing
FB1
FB8
FB2
®
FB6
Microprocessor Data Sheet, Rev. 0.5
Preliminary
FB7
Preliminary Electrical Characteristics
FB9
FB3
27