MCF51JF128VLH FREESCALE [Freescale Semiconductor, Inc], MCF51JF128VLH Datasheet - Page 19

• Manufacturer Part Number: MCF51JF128VLH
• Description: MCF51JF128
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

5.3.1 General Switching Specifications
These general purpose specifications apply to all signals configured for EGPIO, MTIM,
CMT, PDB, IRQ, and I
and full temperature range. The GPIO are set for high drive, no slew rate control, and no
input filter, digital or analog, unless otherwise specified.
1. The greater synchronous and asynchronous timing must be met.
2. This is the shortest pulse that is guaranteed to be recognized.
Freescale Semiconductor, Inc.
G1
G2
G3
G4
Symbol
Bus clock from CLK_OUT pin high to GPIO output valid
Bus clock from CLK_OUT pin high to GPIO output invalid
(output hold)
GPIO input valid to bus clock high
Bus clock from CLK_OUT pin high to GPIO input invalid
GPIO pin interrupt pulse width (digital glitch filter disabled)
Synchronous path
GPIO pin interrupt pulse width (digital glitch filter disabled,
analog filter enabled)
Asynchronous path
GPIO pin interrupt pulse width (digital glitch filter disabled,
analog filter disabled)
Asynchronous path
External reset pulse width (digital glitch filter disabled)
Mode select (MS) hold time after reset deassertion
Bus clock
Data outputs
Data inputs
1
2
2
2
C signals. The conditions are 50 pf load, V
Table 9. EGPIO General Control Timing
Description
MCF51JF128 Data Sheet, Rev. 6, 01/2012.
Figure 3. EGPIO timing diagram
G3
G4
G1
—
1
28
—
1.5
100
50
100
2
G2
Min.
Nonswitching electrical specifications
DD
32
—
—
4
—
—
—
—
—
= 1.71 V to 3.6 V,
Max.
ns
ns
ns
ns
Bus
clock
cycles
ns
ns
ns
Bus
clock
cycles
Unit
19