MC9S08QD2MPS FREESCALE [Freescale Semiconductor, Inc], MC9S08QD2MPS Datasheet - Page 64

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MC9S08QD2MPS

Manufacturer Part Number
MC9S08QD2MPS
Description
8-Bit HCS08 Central Processor Unit (CPU)
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1
1
Chapter 5 Resets, Interrupts, and General System Control
5.8.5
This high-page register contains bits to configure MCU-specific features on MC9S08QD4 series devices.
5.8.6
These high-page read-only registers are included so host development systems can identify the HCS08
derivative and revision number. This allows the development software to recognize where specific
memory blocks, registers, and control bits are located in a target MCU.
64
COPCLKS
This bit can be written only one time after reset. Additional writes are ignored.
The revision number that is hard coded into these bits reflects the current silicon revision level.
Reset:
Reset:
REV[3:0]
ID[11:8]
Field
Field
7:4
3:0
7
W
W
R
R
COPCLKS
REV3
System Options Register 2 (SOPT2)
System Device Identification Register (SDIDH, SDIDL)
COP Watchdog Clock Select — This write-once bit selects the clock source of the COP watchdog.
0 Internal 32 kHz clock is source to COP.
1 Bus clock is source to COP.
Revision Number — The high-order 4 bits of address SDIDH are hard coded to reflect the current mask set
revision number (0–F).
Part Identification Number — Each derivative in the HCS08 family has a unique identification number. The
MC9S08QD4 series is hard coded to the value 0x011. See also ID bits in
0
0
7
7
1
1
Figure 5-7. System Device Identification Register — High (SDIDH)
= Unimplemented or Reserved
= Unimplemented or Reserved
REV2
0
0
0
6
6
1
Figure 5-6. System Options Register 2 (SOPT2)
Table 5-7. SOPT2 Register Field Descriptions
Table 5-8. SDIDH Register Field Descriptions
MC9S08QD4 Series MCU Data Sheet, Rev. 3
REV1
0
0
0
5
5
1
REV0
0
0
0
4
4
1
Description
Description
ID11
3
0
0
3
0
ID10
Table
0
0
0
2
2
5-9.
Freescale Semiconductor
ID9
0
0
0
1
1
ID8
0
0
0
0
0

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