MC9S08AW8A FREESCALE [Freescale Semiconductor, Inc], MC9S08AW8A Datasheet - Page 90

• Manufacturer Part Number: MC9S08AW8A
• Description: 8-Bit HCS08 Central Processor Unit (CPU)
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

1
1
Chapter 6 Parallel Input/Output
6.7.2
In addition to the I/O control, port A pins are controlled by the registers listed below.
90
Bits 6 through 3 are reserved bits that must always be written to 0.
Bits 6 through 3 are reserved bits that must always be written to 0.
PTADDn
PTAPEn
Reset
Reset
7, 2:0
7, 2:0
Field
Field
W
W
R
R
PTADD7
PTAPE7
Port A Pin Control Registers (PTAPE, PTASE, PTADS)
Data Direction for Port A Bits — These read/write bits control the direction of port A pins and what is read for
PTAD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port A bit n and PTAD reads return the contents of PTADn.
Internal Pullup Enable for Port A Bits — Each of these control bits determines if the internal pullup device is
enabled for the associated PTA pin. For port A pins that are configured as outputs, these bits have no effect and
the internal pullup devices are disabled.
0 Internal pullup device disabled for port A bit n.
1 Internal pullup device enabled for port A bit n.
0
0
7
7
Figure 6-11. Data Direction for Port A Register (PTADD)
Figure 6-12. Internal Pullup Enable for Port A (PTAPE)
R
R
0
0
6
6
Table 6-2. PTADD Register Field Descriptions
Table 6-3. PTADD Register Field Descriptions
MC9S08AC16 Series Data Sheet, Rev. 6
R
R
0
0
5
5
R
R
0
0
4
4
Description
Description
R
R
3
0
3
0
PTADD2
PTAPE2
0
0
2
2
1
1
PTADD1
PTAPE1
Freescale Semiconductor
0
0
1
1
PTADD0
PTAPE0
0
0
0
0