MC9S08AW8A FREESCALE [Freescale Semiconductor, Inc], MC9S08AW8A Datasheet - Page 102
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MC9S08AW8A
Manufacturer Part Number
MC9S08AW8A
Description
8-Bit HCS08 Central Processor Unit (CPU)
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S08AW8A.pdf
(344 pages)
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Chapter 6 Parallel Input/Output
6.7.10
In addition to the I/O control, port E pins are controlled by the registers listed below.
102
PTEPE[7:0]
PTESE[7:0]
Reset
Reset
Field
Field
7:0
7:0
W
W
R
R
PTEPE7
PTESE7
Port E Pin Control Registers (PTEPE, PTESE, PTEDS)
Internal Pullup Enable for Port E Bits— Each of these control bits determines if the internal pullup device is
enabled for the associated PTE pin. For port E pins that are configured as outputs, these bits have no effect and
the internal pullup devices are disabled.
0 Internal pullup device disabled for port E bit n.
1 Internal pullup device enabled for port E bit n.
Output Slew Rate Control Enable for Port E Bits — Each of these control bits determine whether output slew
rate control is enabled for the associated PTE pin. For port E pins that are configured as inputs, these bits have
no effect.
0 Output slew rate control disabled for port E bit n.
1 Output slew rate control enabled for port E bit n.
0
0
7
7
Figure 6-33. Output Slew Rate Control Enable for Port E (PTESE)
PTEPE6
PTESE6
0
0
6
6
Figure 6-32. Internal Pullup Enable for Port E (PTEPE)
Table 6-24. PTESE Register Field Descriptions
Table 6-23. PTEPE Register Field Descriptions
PTEPE5
PTESE5
MC9S08AC16 Series Data Sheet, Rev. 6
0
0
5
5
PTEPE4
PTESE4
0
0
4
4
Description
Description
PTEPE3
PTESE3
3
0
3
0
PTEPE2
PTESE2
0
0
2
2
PTEPE1
PTESE1
Freescale Semiconductor
0
0
1
1
PTEPE0
PTESE0
0
0
0
0
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