EP9312-EB CIRRUS [Cirrus Logic], EP9312-EB Datasheet - Page 36

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EP9312-EB

Manufacturer Part Number
EP9312-EB
Description
Universal Platform System-on-chip Processor
Manufacturer
CIRRUS [Cirrus Logic]
Datasheet
EP9312
Universal Platform SOC Processor
36
DSTROBE
DSTROBE
HDMARDYn
DD (15:0)
DD (15:0)
DSTROBE
(device)
(device)
DMACKn
DD(15:0)
DMARQ
(device)
(device)
(device)
(host)
(host)
STOP
Note:
(host)
(host)
(host)
DD (15:0) and DSTROBE signals are shown at both the host and the device to emphasize that cable settling time as well as
cable propagation delay shall not allow the data signals to be considered stable at the host until some time after they are driven
by the device.
t
DH
t
DVH
©
t
Copyright 2005 Cirrus Logic (All Rights Reserved)
CYCRD
Figure 21. Host Pausing an Ultra DMA data-in Burst
Figure 20. Sustained Ultra DMA data-in Burst
t
DS
t
t
SR
DVS
t
2CYCRD
t
DH
t
DVH
t
CYCRD
t
RFS
t
DS
t
RP
t
DVS
t
DH
t
2CYCRD
t
DVH
DS515PP7

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