P89LPC980 NXP [NXP Semiconductors], P89LPC980 Datasheet - Page 29

• Manufacturer Part Number: P89LPC980
• Description: 8-bit microcontroller with accelerated two-clock 80C51 core, 4 kB/8 kB wide-voltage byte-erasable flash with 10-bit ADC
• Manufacturer: NXP [NXP Semiconductors]

Table 6.
* indicates SFRs that are bit addressable.
[1]
[2]
[3]
[4]
[5]
[6]
Name
TH3
TL3
T4CON
TH4
TL4
TINTF
TRIM
WDCON
WDL
WFEED1
WFEED2
BRGR1 and BRGR0 must only be written if BRGEN in BRGCON SFR is logic 0. If any are written while BRGEN = 1, the result is unpredictable.
All ports are in input only (high-impedance) state after power-up.
The RSTSRC register reflects the cause of the P89LPC980/982/983/985 reset except BOIF bit. Upon a power-up reset, all reset source flags are cleared except POF and BOF;
the power-on reset value is x011 0000.
The only reset sources that affect these SFRs are power-on reset and watchdog reset.
On power-on reset and watchdog reset, the TRIM SFR is initialized with a factory preprogrammed value. Other resets will not cause initialization of the TRIM register.
After reset, the value is 1110 01x1, i.e., PRE2 to PRE0 are all logic 1, WDRUN = 1 and WDCLK = 1. WDTOF bit is logic 1 after watchdog reset and is logic 0 after power-on reset.
Other resets will not affect WDTOF.
Special function registers - P89LPC983/985
Description
Timer/Counter 3
High Byte
Timer/Counter 3
Low Byte
Timer/Counter 2
Control
Timer/Counter 4
High Byte
Timer/Counter 4
Low Byte
Timer/Counters
2/3/4 Overflow
and External
Flags
Internal
oscillator trim
register
Watchdog
control register
Watchdog load
Watchdog
feed 1
Watchdog
feed 2
SFR
addr.
EDH
CDH
CCH
CBH
CEH
EEH
A7H
C1H
C2H
C3H
96H
Bit functions and addresses
RCCLK
PSEL4
PRE2
MSB
-
ENCLK
PRE1
ENT4
-
…continued
TRIM.5
TIEN4
PRE0
TF4
TRIM.4
PWM4
EXF4
-
EXEN4
TRIM.3
TF3
-
WDRUN
TRIM.2
EXF3
TR4
WDTOF
TRIM.1
C/NT4
TF2
CP/NRL4 00
WDCLK
TRIM.0
EXF2
LSB
Reset value
Hex
00
00
00
00
00
[4][5]
[4][6]
FF
Binary
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
1111 1111