P89LPC915FDH NXP [NXP Semiconductors], P89LPC915FDH Datasheet - Page 14

• Manufacturer Part Number: P89LPC915FDH
• Description: 8-bit microcontrollers with accelerated two-clock 80C51 core 2 kB 3 V flash with 8-bit A/D converter
• Manufacturer: NXP [NXP Semiconductors]

Philips Semiconductors
Table 5:
9397 750 14397
Product data
Symbol
P1.0 to P1.5
P2.2
V
V
SS
DD
P89LPC917 pin description
Pin
10
9
8
7
6
3
5
4
12
Type
I/O
(P1.2);
I (P1.5)
I/O
O
I/O
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I/O
I
I
Description
Port 1: Port 1 is a 6-bit I/O port with user-configurable outputs. During reset Port 1
latches are configured in the input only mode with the internal pull-up disabled. The
operation of the outputs depends upon the port configuration selected. Refer to
Section 9.12.1 “Port configurations”
details. P1.2 and P1.3 are open drain when used as outputs. P1.5 is input only.
All pins have Schmitt triggered inputs.
Port 1 also provides various special functions as described below:
P1.0 — Port 1 bit 0.
TxD — Serial port transmitter data.
P1.1 — Port 1 bit 1.
RxD — Serial port receiver data.
P1.2 — Port 1 bit 2. (Open drain when used as an output.)
T0 — Timer/counter 0 external count input, overflow, or PWM output.
SCL — I
P1.3 — Port 1 bit 3. (Open drain when used as an output.)
INT0 — External interrupt 0 input.
SDA — I
P1.4 — Port 1 bit 4.
INT1 — External interrupt 1input.
P1.5 — Port 1 bit 5. (Input only.)
RST — External Reset input during power-on or if selected via UCFG1. When
functioning as a reset input a LOW on this pin resets the microcontroller, causing I/O
ports and peripherals to take on their default states, and the processor begins
execution at address 0. When using an oscillator frequency above 12 MHz, the
reset input function of P1.5 must be enabled. An external circuit is required to
hold the device in reset at power-up until V
When system power is removed V
operating voltage. When using an oscillator frequency above 12 MHz, in some
applications, an external brownout detect circuit may be required to hold the
device in reset when V
Also used during a power-on sequence to force In-System Programming mode.
Port 2: Port 2.2 is a single-bit I/O port with a user-configurable output. During reset
the Port 2.2 latch is configured in the input only mode with the internal pull-up
disabled. The operation of the output depends upon the port configuration selected.
Refer to
characteristics”
This pin has a Schmitt triggered input.
Ground: 0 V reference.
Power Supply: This is the power supply voltage for normal operation as well as Idle
and Power-down modes.
…continued
2
Section 9.12.1 “Port configurations”
2
C-bus serial clock input/output.
C-bus serial data input/output.
Rev. 04 — 17 December 2004
8-bit microcontrollers with accelerated two-clock 80C51 core
for details.
DD
falls below the minimum specified operating voltage.
and
DD
P89LPC915/916/917
will fall below the minimum specified
Table 13 “DC electrical characteristics”
and
DD
has reached its specified level.
Table 13 “DC electrical
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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