AT91SAM9261S-CJ ATMEL [ATMEL Corporation], AT91SAM9261S-CJ Datasheet - Page 18

• Manufacturer Part Number: AT91SAM9261S-CJ
• Description: AT91 ARM Thumb-based Microcontrollers
• Manufacturer: ATMEL [ATMEL Corporation]

8.1.2.1
8.1.2.2
8.2
18
External Memories
AT91SAM9261S
BMS = 1, Boot on Embedded ROM
BMS = 0, Boot on External Memory
The system boots using the Boot Program.
The customer-programmed software must perform a complete configuration.
To speed up the boot sequence when booting at 32 kHz EBI CS0 (BMS=0), the user must take
the following steps:
The external memories are accessed through the External Bus Interface (Bus Matrix Slave 3).
Refer to the memory map in
• DataFlash Boot
• NAND Flash boot
• Boot Uploader in case no valid program is detected in external SPI DataFlash
• Boot on slow clock (32,768 Hz)
• Boot with the default configuration for the Static Memory Controller, byte select mode, 16-bit
1. Program the PMC (main oscillator enable or bypass mode).
2. Program and start the PLL.
3. Reprogram the SMC setup, cycle, hold, mode timings registers for CS0 to adapt them
4. Switch the main clock to the new value.
data bus, Read/Write controlled by Chip Select, allows boot on 16-bit non-volatile memory.
– Downloads and runs an application from SPI DataFlash into internal SRAM
– Downloaded code size from SPI DataFlash depends on embedded SRAM size
– Automatic detection of valid application
– SPI DataFlash connected to SPI NPCS0
– Small monitor functionalities (read/write/run) interface with SAM-BA
– Automatic detection of the communication link
to the new clock
Serial communication on a DBGU (XModem protocol)
USB Device Port (CDC Protocol)
Figure 8-1 on page
15.
®
6242DS–ATARM–06-Jan-09
application