AT91SAM9261S-CJ ATMEL [ATMEL Corporation], AT91SAM9261S-CJ Datasheet - Page 14

• Manufacturer Part Number: AT91SAM9261S-CJ
• Description: AT91 ARM Thumb-based Microcontrollers
• Manufacturer: ATMEL [ATMEL Corporation]

7.2
7.3
7.4
14
Debug and Test Features
Bus Matrix
Peripheral DMA Controller
AT91SAM9261S
• Integrated Embedded In-circuit Emulator Real-Time
• Debug Unit
• IEEE1149.1 JTAG Boundary-scan on All Digital Pins
• Five Masters and Five Slaves handled
• One Address Decoder Provided per Master
• Boot Mode Select Option
• Remap Command
• Transfers from/to peripheral to/from any memory space without intervention of the processor.
• Next Pointer Support, forbids strong real-time constraints on buffer management.
• Nineteen channels
– Two real-time Watchpoint Units
– Two Independent Registers: Debug Control Register and Debug Status Register
– Test Access Port Accessible through JTAG Protocol
– Debug Communications Channel
– Two-pin UART
– Debug Communication Channel Interrupt Handling
– Chip ID Register
– Handles Requests from the ARM926EJ-S, USB Host Port, LCD Controller and the
– Round-Robin Arbitration (three modes supported: no default master, last accessed
– Burst Breaking with Slot Cycle Limit
– Three different slaves may be assigned to each decoded memory area: one for
– Non-volatile Boot Memory can be Internal or External.
– Selection is made by BMS pin sampled at reset.
– Allows Remapping of an Internal SRAM in Place of the Boot Non-Volatile Memory
– Allows Handling of Dynamic Exception Vectors
– Two for each USART
– Two for the Debug Unit
– Two for each Serial Synchronous Controller
– Two for each Serial Peripheral Interface
– One for the Multimedia Card Interface
Peripheral DMA Controller to internal ROM, internal SRAM, EBI, APB, LCD
Controller and USB Host Port.
default master, fixed default master)
internal boot, one for external boot, one after remap.
6242DS–ATARM–06-Jan-09