PIC24HJ32GP202 MICROCHIP [Microchip Technology], PIC24HJ32GP202 Datasheet - Page 85
![no-image](/images/no-image-200.jpg)
PIC24HJ32GP202
Manufacturer Part Number
PIC24HJ32GP202
Description
High-Performance, 16-bit Microcontrollers
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC24HJ32GP202.pdf
(244 pages)
- Current page: 85 of 244
- Download datasheet (4Mb)
For a primary oscillator or FRC oscillator, output ‘F
the PLL output ‘F
EQUATION 7-2:
For example, when a 10 MHz crystal is being used,
with “XT with PLL” being the selected oscillator mode.
• If PLLPRE<4:0> = 0, then N1 = 2. This yields a
FIGURE 7-2:
TABLE 7-1:
© 2007 Microchip Technology Inc.
Fast RC Oscillator with Divide-by-N
(FRCDIVN)
Fast RC Oscillator with Divide-by-16
(FRCDIV16)
Low-Power RC Oscillator (LPRC)
Secondary (Timer1) Oscillator (SOSC)
Primary Oscillator (HS) with PLL
(HSPLL)
Primary Oscillator (XT) with PLL
(XTPLL)
Primary Oscillator (EC) with PLL
(ECPLL)
Primary Oscillator (HS)
Primary Oscillator (XT)
Primary Oscillator (EC)
Fast RC Oscillator with PLL (FRCPLL)
Fast RC Oscillator (FRC)
Note 1:
Source (Crystal, External Clock
or Internal RC)
VCO input of 10/2 = 5 MHz, which is within the
acceptable range of 0.8-8 MHz.
2:
Oscillator Mode
OSC2 pin function is determined by the OSCIOFNC Configuration bit.
This is the default oscillator mode for an unprogrammed (erased) device.
PIC24HJ32GP202/204 and PIC24HJ16GP304
F
OSC
OSC
CONFIGURATION BIT VALUES FOR CLOCK SELECTION
= F
’ is given by:
F
PIC24HJ32GP202/204 AND PIC24HJ16GP304 PLL BLOCK DIAGRAM
IN
OSC
*
(
N1*N2
CALCULATION
M
)
PLLPRE
Oscillator Source
0.8-8.0 MHz
Divide by
Secondary
Primary
Primary
Primary
Primary
Primary
Primary
2-33
Internal
Internal
Internal
Internal
Internal
Here
Preliminary
IN
’,
X
• If PLLDIV<8:0> = 0x1E, then M = 32. This yields a
• If PLLPOST<1:0> = 0, then N2 = 2. This provides
EQUATION 7-3:
VCO output of 5 x 32 = 160 MHz, which is within
the 100 MHz to 200 MHz range, which is needed.
a Fosc of 160/2 = 80 MHz. The resultant device
operating speed is 80/2 = 40 MIPS.
POSCMD<1:0>
Divide by
F
PLLDIV
CY
2-513
VCO
=
xx
xx
xx
xx
10
01
00
10
01
00
xx
xx
F
100-200 MHz
2
OSC
Here
=
2
1
(
10000000*32
PLLPOST
XT WITH PLL MODE
EXAMPLE
Divide by
2, 4, 8
2*2
FNOSC<2:0>
111
110
101
100
011
011
011
010
010
010
001
000
)
12.5-80 MHz
= 40 MIPS
DS-70289A-page 83
Here
Note
F
1, 2
1
1
1
1
1
1
1
OSC
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