PIC24HJ32GP202 MICROCHIP [Microchip Technology], PIC24HJ32GP202 Datasheet - Page 51
PIC24HJ32GP202
Manufacturer Part Number
PIC24HJ32GP202
Description
High-Performance, 16-bit Microcontrollers
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC24HJ32GP202.pdf
(244 pages)
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REGISTER 5-1:
TABLE 5-1:
© 2007 Microchip Technology Inc.
bit 1
bit 0
Note 1:
TRAPR (RCON<15>)
IOPUWR (RCON<14>)
CM (RCON<9>)
EXTR (RCON<7>)
SWR (RCON<6>)
WDTO (RCON<4>)
SLEEP (RCON<3>)
IDLE (RCON<2>)
BOR (RCON<1>)
POR (RCON<0>)
Note:
2:
All Reset flag bits may be set or cleared by the user software.
All of the Reset status bits can be set or cleared in software. Setting one of these bits in software does not
cause a device Reset.
If the FWDTEN Configuration bit is ‘1’ (unprogrammed), the WDT is always enabled, regardless of the
SWDTEN bit setting.
PIC24HJ32GP202/204 and PIC24HJ16GP304
Flag Bit
BOR: Brown-out Reset Flag bit
1 = A Brown-out Reset has occurred
0 = A Brown-out Reset has not occurred
POR: Power-on Reset Flag bit
1 = A Power-up Reset has occurred
0 = A Power-up Reset has not occurred
RESET FLAG BIT OPERATION
RCON: RESET CONTROL REGISTER
Trap conflict event
Illegal opcode or uninitialized
W register access
Configuration mismatch
MCLR Reset
RESET instruction
WDT time-out
PWRSAV #SLEEP instruction
PWRSAV #IDLE instruction
BOR
POR
Preliminary
Setting Event
(1)
POR, BOR
POR, BOR
POR, BOR
POR
POR, BOR
PWRSAV instruction, POR, BOR,
CLRWDT instruction
POR, BOR
POR, BOR
—
—
Clearing Event
DS70289A-page 49
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