SLB128B NSC [National Semiconductor], SLB128B Datasheet - Page 15

• Manufacturer Part Number: SLB128B
• Description: Transmitter with built-in scaler for LVDS Display Interface (LDI)
• Manufacturer: NSC [National Semiconductor]

OPTION SELECTION
V
TST1, TST2,
TST3
POWER (See Application Information for power supply decoupling requirements)
V
GND/DGND
V
GND3V
SPLLV
SPLLGND
PLLV
PLLGND
LVDSV
LVDSGND
LVDSV
LVDSGND3V
DS90C2501 Pin Description
Note 11: When device power is applied, it is possible for these outputs to switch to a logic “1” momentarily as the 3.3V is rising and before 2.5V reaches at least
0.8V. During this brief period, the pad control logic could be non-deterministic, RESETN will have no effect. It is recommended these outputs are gated externally
if the system design requires them to remain in the inactive logic “0” state during power-on.
REF
CC
CC
Pin Name
/DV
3V
CC
CC
CC
CC
CC
3V
19, 20, 85
86, 88, 90
91, 93, 95
118, 122,
120, 126,
101, 103,
102, 106,
123, 125
121, 127
105, 109
104, 108
107, 111
110, 112
96, 119,
Pin No.
81, 82,
75, 77,
33, 73,
74, 76,
78, 79,
80, 84,
87, 89
92, 94
124
128
83
I-LVTTL 2.5
I-ANALOG
I/O Type
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
(Continued)
This pin is never to be left floating and never tie to GND.
For LVTTL level data input, tie V
is set to LVTTL level.
For low voltage swing level data input, tie V
host interface) V
data is in low voltage swing mode.
Input data = logic High = V
Input data = logic Low = V
These pins are used in production testing and should be tied to GND in
normal operation.
Power supply pins (pin 75, 77, 81, 82, 96, 119, 123, and 125) for 2.5V LVTTL
inputs and digital circuitry.
GND or DGND reference for 2.5V TTL inputs and digital circuitry.
The V
During power up stage, voltage readings on these pins must be higher than
2.5V pins.
Ground return pins for V
2.5V power supply pins for scaler PLL circuitry. It is not recommended to
share this power with PLLV
Ground returns for scaler PLL circuitry.
2.5V power supply pins for Tx PLL circuitry. It is not recommended to share
this power with SPLLV
Ground returns for Tx PLL circuitry.
Power supply pins for LVDS output drivers.
Ground return pins for LVDS output drivers.
3V power supply pins for LVDS output drivers.
During power up stage, voltage readings on these pins must be higher than
2.5V pins.
Ground return pins for 3V LVDS outputs.
CC
3V is required for internal logic and certain 3V I/O.
15
DDQ
is from the host. When V
CC
CC
.
REF
3V powered logic.
REF
CC
.
−100 mV in low voltage swing level.
+100 mV in low voltage swing level.
REF
Description
to V
CC
3V. When V
REF
REF
to
1
<
⁄
2
=1.0V, indicates input
V
DDQ
REF
(V
>
DDQ
1.8V, input data
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