LT3825EFE-PBF LINER [Linear Technology], LT3825EFE-PBF Datasheet - Page 15

• Manufacturer Part Number: LT3825EFE-PBF
• Description: Isolated No-Opto Synchronous Flyback Controller with Wide Input Supply Range
• Manufacturer: LINER [Linear Technology]

APPLICATIONS INFORMATION
Ripple current and percentage ripple is largest at minimum
duty cycle; in other words, at the highest input voltage.
L
where:
For a 48V (V
effi ciency, P
and f
Optimization might show that a more effi cient solution
is obtained at higher peak current but lower inductance
and the associated winding series resistance. A simple
spreadsheet program is useful for looking at tradeoffs.
Transformer Core Selection
Once L
effi ciency converters use ferrite cores to minimize core
loss. Actual core loss is independent of core size for a fi xed
inductance, but decreases as inductance increases. Since
increased inductance is accomplished through more turns
of wire, copper losses increase. Thus transformer design
balances core and copper losses. Remember that increased
winding resistance will degrade cross regulation and in-
crease the amount of load compensation required.
L
P
P
f
DC
X
DC
L
is calculated from:
OSC
=
MAX
P
OSC
MIN
(
MIN
=
P
V
f
is the oscillator frequency
IN MAX
OSC
is known, the type of transformer is selected. High
200kHz • 0.4 • 44.44W
is ripple current ratio at maximum input voltage
= 200kHz:
is the DC at maximum input voltage
(
=
IN
OUT
•
1+
(
72V • 0.357
X
= 36V to 72V) to 5V/8A converter with 90%
)
MAX
N • V
•
= 40W and P
DC
V
1
MIN
•
IN(MAX)
OUT
P
IN
)
2
)
=
2
=
IN
(
V
1+
IN MAX
= 44.44W. Using X = 0.4
f
OSC
(
= 186μH
8
1
1
•
•
)
72
X
5
•
MAX
D D C
= 35.7%
MIN
•
P
OUT
)
2
•
Eff
The main design goals for core selection are reducing
copper losses and preventing saturation. Ferrite core
material saturates hard, rapidly reducing inductance
when the peak design current is exceeded. This results
in an abrupt increase in inductor ripple current and, con-
sequently, output voltage ripple. Do not allow the core
to saturate! The maximum peak primary current occurs
at minimum V
Using the example numbers leads to:
Multiple Outputs
One advantage that the fl yback topology offers is that ad-
ditional output voltages can be obtained simply by adding
windings. Designing a transformer for such a situation is
beyond the scope of this document. For multiple windings,
realize that the fl yback winding signal is a combination of
activity on all the secondary windings. Thus load regulation
is affected by each windings load. Take care to minimize
cross regulation effects.
I
DC
now :
X
PK
MIN
I
MAX
PK
=
= 0.202
=
V
=
IN(MIN)
=
(
36 • 0.526
V
1+
44.44W
IN(MIN)
f
OSC
P
N • V
IN
IN
• DC
:
• L
V
1
• DC
OUT
IN(MIN)
MAX
P
• P
• 1+
MAX
IN
• 1+
=
)
2
0.202
1+
=
X
2
MIN
8
1
200kHz • 186μH • 44.44
2
1
•
36
5
= 2.58A
(
36 • 52.6%
= 52.6%
LT3825
)
15
2
3825fa