VFC101JN BURR-BROWN [Burr-Brown Corporation], VFC101JN Datasheet - Page 6

• Manufacturer Part Number: VFC101JN
• Description: Synchronized VOLTAGE-TO-FREQUENCY CONVERTER
• Manufacturer: BURR-BROWN [Burr-Brown Corporation]

FIGURE 2. Offset for Bipolar Input Voltages.
INSTALLATION AND
OPERATING INSTRUCTIONS
The integrator capacitor C
magnitude of the integrator voltage waveform. Its absolute
accuracy is not critical since it does not affect the transfer
function. Figure 3 facilitates choosing an appropriate stan-
dard value to assure that the integrator waveform voltage is
within acceptable limits. Good dielectric absorption proper-
ties are required to achieve best linearity. Mylar™, polycar-
bonate, mica, polystyrene, Teflon™ and glass types are
appropriate choices. Choice will depend on the particular
value and size. Ceramic capacitors vary considerably from
type to type and some produce significant nonlinearities.
Polarized capacitors should not be used.
Deviation from the nominal recommended +1V to –0.75V
integrator voltage (as controlled by the integrator capacitor
value) is permissible and will have a negligible effect on
FIGURE 3. Integrator Capacitor Selection Graph.
Mylar™, Teflon™ E. I. du Pont de Nemours & Co.
V
IN
1000p
0.01µ
100p
0.1µ
10µ
–5V
+5V
1µ
to
100
NOTE: (1)This is the maximum swing of the integrator output
voltage referred to the comparator noninverting input voltage.
10
®
7
9
6
VFC101
1k
8
10k
4k
10k
16k
Full-Scale Frequency (Hz)
10k
INT
+2.5V
–1.9V
Integrator Swing
+100mV
–75mV
(see Figure 1) affects the
Ground
Analog
100k
+1V
–0.75V
5
–V
Integrator
1mA
I
1
CC
C
INT
(1)
16
1M
4
Comparator
17
18
10M
TTL/CMOS
f
CLOCK
6
13
VFC operation. It may be desirable to deviate from the
suggested value. Smaller integrator voltages, for instance,
allow more “headroom” for averaging noisy input signals.
The VFC is a fully integrating input converter, able to reject
large levels of interfering noise. This ability is limited only
by the output voltage swing range of the integrator amplifier.
By setting a small integrator voltage swing using a large
C
integrator output saturation and loss of accuracy.
The maximum integrator voltage swing requirement is nearly
symmetrical about the comparator threshold voltage (see
Figure 5.) One-third greater swing is required above the
threshold than below it. Maximum demand on positive
integrator swing occurs at low scale, while the negative
swing is greatest just below full scale.
CLOCK INPUT
The clock input is TTL- and CMOS-compatible. Its input
threshold is approximately 1.4V (two diode voltage drops)
referenced to digital ground (pin 15). The clock “high” input
may be standard TLL or may be as high as +V
input has a high input impedance, so no special drivers are
required. Rise time in the transition region from 0.5V to 2V
must be less than 2 s for proper operation.
OUTPUT
The frequency output is an open collector current-sink
transistor. Output pulses are active-low during the reset
integration period (see “Shortened Output Pulses”.)
Interface to a logic circuit normally uses a pull-up resistor to
the logic power supply. Selection of the pull-up resistor
should be made such that no more than 15mA flows in the
output transistor. The actual choice of the pull-up resistor
may depend on the full-scale frequency and the stray capaci-
INT
Reference
Clocked
Logic
value, larger levels of noise can be integrated without
5V
20
One-Shot
Output
+V
CC
+V
12
+V
2
0.1µF
CC
CC
–V
CC
11
–V
CC
0.1µF
+V
15
14
L
Ground
Digital
0 to f
CC
0.1µF
. The clock
f
OUT
CLOCK
/2