STTS752E STMICROELECTRONICS [STMicroelectronics], STTS752E Datasheet - Page 14

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STTS752E

Manufacturer Part Number
STTS752E
Description
Digital temperature sensor and thermal watchdog
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
2.5
2.6
14/38
Fault tolerance
For both Comparator and Interrupt modes, the alarm “fault tolerance” setting plays a role in
determining when the OS/INT output will be activated. Fault tolerance refers to the number
of consecutive times an error condition must be detected before the user is notified. Higher
fault tolerance settings can help eliminate false alarms caused by noise in the system. The
alarm fault tolerance is controlled by the bits (Bits 4 and 3) in the Configuration Register.
These bits can be used to set the fault tolerance to 1, 2, 4, or 6 as shown in
power-up, these bits both default to logic '0.'
Table 2.
Shutdown mode
For power-sensitive applications, the STTS75 offers a low-power shutdown mode. The SD
Bit in the Configuration register controls shutdown mode. When SD is changed to login '1,'
the conversion in progress will be completed and the result stored in the temperature
register, after which the STTS75 will go into a low-power standby state. The OS/INT output
will be cleared if the thermostat is operating in Interrupt mode and the OS/INT will remain
unchanged in Comparator mode. The 2-wire interface remains operational in shutdown
mode, and writing a '0' to the SD Bit returns the STTS75 to normal operation.
Table 3.
1. The shutdown command needs to be programmed before sending a one-shot command.
Continuous conversion
Continuous conversion
FT1
Operational mode
0
0
1
1
Shutdown
One-shot
Fault tolerance setting
Shutdown mode and one-shot mode description
FT0
0
1
0
1
(1)
STTS75 (Consecutive Faults)
One-shot mode (OSM) (bit 7)
1
2
4
6
0
0
1
1
Power-up default
Shutdown (SD) (bit 0)
Comments
0
1
0
1
Table
2. At

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