STLM75DS2E STMICROELECTRONICS [STMicroelectronics], STLM75DS2E Datasheet - Page 14

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STLM75DS2E

Manufacturer Part Number
STLM75DS2E
Description
Digital temperature sensor and thermal watchdog
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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Fault tolerance
For both Comparator and Interrupt modes, the alarm “fault tolerance” setting plays a role in
determining when the OS output will be activated. Fault tolerance refers to the number of
consecutive times an error condition must be detected before the user is notified. Higher
fault tolerance settings can help eliminate false alarms caused by noise in the system. The
alarm fault tolerance is controlled by the bits (4 and 3) in the Configuration register. These
bits can be used to set the fault tolerance to 1, 2, 4, or 6 as shown in
these bits both default to logic '0'.
Table 2.
Shutdown mode
For power-sensitive applications, the STLM75 offers a low-power Shutdown mode. The SD
Bit in the Configuration register controls Shutdown mode. When SD is changed to logic '1,'
the conversion in progress will be completed and the result stored in the Temperature
register, after which the STLM75 will go into a low-power standby state. The OS output will
be cleared if the thermostat is operating in Interrupt mode and the OS will remain
unchanged in Comparator mode. The 2-wire interface remains operational in Shutdown
mode, and writing a '0' to the SD Bit returns the STLM75 to normal operation.
FT1
0
0
1
1
FT0
0
1
0
1
Fault tolerance setting
STLM75 (Consecutive Faults)
1
2
4
6
Power-up Default
Comments
Table
2. At power-up,

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