STM6510LCACDG6F STMICROELECTRONICS [STMicroelectronics], STM6510LCACDG6F Datasheet - Page 5

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STM6510LCACDG6F

Manufacturer Part Number
STM6510LCACDG6F
Description
Dual push-button Smart ResetTM with capacitor-adjustable delays
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
STM6510
1
1.1
1.2
Description
Smart Reset™ devices
The Smart Reset™ device family STM65xx provides a useful feature that ensures
inadvertent short reset push-button closures do not cause system resets. This is done by
implementing an extended Smart Reset™ input delay (t
input levels and setup delay are met, the device generates an output reset pulse with user-
programmable timeout period (t
The typical application hookup shows that the dual Smart Reset™ inputs can be also
connected to the applications interrupt to allow the control of both the interrupt pin and the
hard reset functions. If the push-buttons are closed for a short time, the processor is only
interrupted. If the system still does not respond properly, holding the push-buttons for the
extended setup time (t
The Smart Reset™ feature helps significantly increase system stability.
The STM65xx family of Smart Reset™ devices consists of low-current microprocessor reset
circuits targeted at applications such as MP3 players, portable navigation devices or mobile
phones, generally any application that requires delayed reset push-button(s) response for
improved system stability. The STM65xx devices feature single or dual Smart Reset™
inputs (SRx). The delayed Smart Reset™ setup time (t
adding an external capacitor on the SRC pin or selectable by three-state logic. The delayed
setup period ignores switch closures shorter than t
The STM65xx devices have active-low (optionally active-high) open-drain reset (RST)
output(s) with or without an internal pull-up resistor or push-pull as output options, with or
without the power-on reset function.
Some devices also have an undervoltage monitoring feature: the reset output is also
asserted when the monitored supply voltage V
reset output remains asserted for the reset timeout period (t
voltage goes above the specified threshold.
STM6510
The STM6510 has two combined Smart Reset™ inputs (SR0 and SR1) with Smart Reset™
setup delay (t
STM6510 feature is adjustable output reset pulse time t
(C
Additionally, the V
reset output goes active and remains active while V
defined duration of the reset pulse t
tREC
).
SRC
) programmed by an external capacitor on the SRC pin. An additional
CC
is monitored and if it drops below the selected V
SRC
) causes a hard reset of the processor through the reset output.
Doc ID 16788 Rev 2
REC
).
REC
.
CC
drops below the specified threshold. The
SRC
CC
, thus preventing undesired resets.
is below the V
SRC
REC
SRC
) options are adjustable by
). Once the valid Smart Reset™
REC
by adding an external capacitor
) after the monitored supply
RST
RST
threshold, plus the
threshold, the
Description
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