NCP1654_09 ONSEMI [ON Semiconductor], NCP1654_09 Datasheet - Page 13

• Manufacturer Part Number: NCP1654_09
• Description: Power Factor Controller for Compact and Robust, Continuous Conduction Mode Pre-Converters
• Manufacturer: ONSEMI [ON Semiconductor]

PRINCIPLE OF NCP1654 SCHEME
CCM PFC Boost
input voltage is a rectified 50 ro 60 Hz sinusoidal signal.
The MOSFET is switching at a high frequency (typically
65/133/200 kHz in NCP1654) so that the inductor current
I
components.
capacitor in order to eliminate the high−frequency
component of the inductor I
be too bulky because it can pollute the power factor by
distorting the rectified sinusoidal input voltage.
PFC Methodology
particularly designed for CCM operation. The PFC
methodology is described in this section.
switching period T includes a charging phase for duration
t
conversion ratio is obtained in (Equation 1).
where
V
V
T is the switching period,
t
t
1
1
2
L
out
in
A CCM PFC boost converter is shown in Figure 31. The
Filter capacitor C
The NCP1654 uses a proprietary PFC methodology
As shown in Figure 32, the inductor current I
is the MOSFET on time, and
is the MOSFET off time.
and a discharging phase for duration t
is the rectified input voltage,
basically consists of high and low−frequency
is the output voltage of PFC stage,
V
in
Figure 32. Inductor Current in CCM
Figure 31. CCM PFC Boost Converter
I
L
I
in
t
1
V
V
V
C
out
in
in
filter
filter
R
+
+
SENSE
T
L
T * t
is an essential and very small value
t
1
T
t
) t
2
t
2
L
1
I
. This filter capacitor cannot
L
2
V
+
out
T * t
T
I
in
1
2
. The voltage
Time
C
+
bulk
Voltage
Output
http://onsemi.com
L
(eq. 1)
V
in a
out
13
filter absorbs the high−frequency component of inductor
current I
signal only of the inductor current.
where
I
I
it is with a 50 Hz bandwidth of the original I
impedance Z
where Z
in (Equation 3) is constant or varies slowly in the 50 or 60
Hz bandwidth.
Figure 33. The MOSFET on time t
intersection of reference voltage V
V
where
in
L
Figure 33. PFC Duty Modulation and Timing Diagram
ramp
The input filter capacitor C
I
From (Equation 1) and (Equation 2), the input
Power factor is corrected when the input impedance Z
The PFC modulation and timing diagram is shown in
is the inductor current.
is the input AC current.
L−50
Latch Reset
V
. A relationship in (Equation 4) is obtained.
Latch Set
C
M
Inductor
Filtering
supposes a 50 Hz operation. The suffix 50 means
ramp
Current
in
L
without
Output
. It makes the input current I
V
Clock
is input impedance.
ramp
V
V
ref
in
M
V
I
ch
is formulated.
0
ramp
Z
in
+
1
+ V
V
I
I
in
in
in
m
+ I
+
V
+
)
M
T * t
filter
C
L*50
I
Clock
ch
T
ramp
V
V
ref
t
ramp
and the front−ended EMI
1
1
-
+
+ V
REF
I
1
V
L*50
PFC Modulation
out
is generated by the
in
REF
and ramp voltage
a low−frequency
L
.
R
S
Q
(eq. 2)
(eq. 3)
(eq. 4)
in