S-8233BBFT SII [Seiko Instruments Inc], S-8233BBFT Datasheet - Page 10

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S-8233BBFT

Manufacturer Part Number
S-8233BBFT
Description
BATTERY PROTECTION IC (FOR A 3-SERIAL-CELL PACK)
Manufacturer
SII [Seiko Instruments Inc]
Datasheet

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10
BATTERY PROTECTION IC FOR 3-SERIAL-CELL PACK
S-8233B Series
(13) Measurement 13 Measurement circuit 8
(14) Measurement 14 Measurement circuit 9
(15) Measurement 15 Measurement circuit 10
(16) Measurement 16 Measurement circuit 1 ( Measurement will be changed by the CTL logic! )
Set S4 to ON, S1, S2, S3, S5, and S6 to OFF, V1, V2, V3 to 3.5 V and V6, V7, and V8 to 0 V under
normal condition. Increase V5 from 0 V gradually. The V5 voltage when I5 = 10 μA is the CD1'L' voltage
(V
Set S5 to ON, S1, S2, S3, S4, and S6 to OFF, V1, V2, and V3 to 3.5 V and V5, V7, and V8 to 0 V under
normal condition. Increase V6 from 0 V gradually. The V6 voltage when I6 = 10 μA is the CD2'L' voltage
(V
Set S6 to ON, S1, S2, S3, S4, and S5 to OFF, V1, V2, and V3 to 3.5 V and V5, V6, and V8 to 0 V under
normal condition. Increase V7 from 0 V gradually. The V7 voltage when I7 = 10 μA is the CD3'L' voltage
(V
Set S1 to ON, S2, S3, S4, S5, and S6 to OFF, V1 to 4.5 V, V2 and V3 to 3.5 V and V5, V6, and V7 to 0 V
under over charge condition. Increase V8 from 0 V gradually. The V8 voltage when I8 = 0.1 μA is the
CD1'H' voltage (V
Set S2 to ON, S1, S3, S4, S5, and S6 to OFF, V2 to 4.5 V, V1 and V3 to 3.5 V and V5, V6, and V7 to 0 V
under over charge condition. Increase V4 from 0 V gradually. The V4 voltage when I1 = 0.1 μA is the
CD2'H' voltage (V
Set S3 to ON, S1, S2, S4, S5, and S6 to OFF, V3 to 4.5 V, V1 and V2 to 3.5 V and V5, V6, and V7 to 0 V
under over charge condition. Increase V8 from 0 V gradually. The V8 voltage when I8 = 0.1 μA is the
CD3'H' voltage (V
Set V1, V2, and V3 to 4.5 V under over charge condition. The current I1 flowing to COP terminal is COP
OFF LEAK current (I
Set V1, V2, and V3 to 0 V, and V5 to 2 V, and decrease V5 gradually. The V5 voltage when COP = 'H'
(V
CD1(L)
CD2(L)
CD3(L)
SS
2) If the CTL logic is “reverse”
1) If the CTL logic is “normal”
+ 0.3 V or higher) is the 0 V charge start voltage (V
Set V1, V2, and V3 to 3.5 V, and V4 to 0 V, and increase V4 gradually. The V4 voltage when COP
= 'H' (V
(V
After that decrease V4 gradually. The V4 voltage when COP = 'L' (V
'L' (V
Set V1, V2, and V3 to 3.5 V, and V4 to10.5 V, and decrease V4 gradually. The V4 voltage when
COP = 'H' (V
(V
After that increase V4 gradually. The V4 voltage when COP ='L' (V
= 'L' (V
)
).
).
CTL(H)
CTL(L)
CC
).
CC
)
SS
- 0.3 V or lower) is the CTL'L' input voltage (V
.
- 0.3 V or lower) is the CTL'H' input voltage (V
+ 0.3 V or higher) and DOP = 'H' (V
CD1(H)
CD2(H)
CD3(H)
SS
COL
+ 0.3 V or higher) and DOP = 'H' (V
).
).
).
).
Seiko Instruments Inc.
SS
+ 0.3 V or higher) is the CTL 'H' input voltage
0CHAR
SS
+ 0.3 V or higher) is the CTL'L' input voltage
CTL(L)
).
CTL(H)
).
).
VMP
CC
- 0.3 V or lower) and DOP =
- 0.3 V or lower) and DOP
Rev.4.2
_00

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