LT3640EFE LINER [Linear Technology], LT3640EFE Datasheet - Page 4

no-image

LT3640EFE

Manufacturer Part Number
LT3640EFE
Description
Dual Monolithic Buck Regulator with Power-On Reset and Watchdog Timer
Manufacturer
LINER [Linear Technology]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LT3640EFE#PBF
Manufacturer:
Linear Technology
Quantity:
135
Part Number:
LT3640EFE#PBF
Manufacturer:
LT
Quantity:
3 000
Part Number:
LT3640EFE#PBF
Manufacturer:
LINEAR/凌特
Quantity:
20 000
Part Number:
LT3640EFE#TRPBF
Manufacturer:
LINEAR/凌特
Quantity:
20 000
PARAMETER
SS1, SS2 Charge Current
SS1 to FB1 Offset Voltage
SS2 to FB2 Offset Voltage
RST1 Threshold as Percentage of V
RST2 Threshold as Percentage of V
Undervoltage to RST Assert Time
RST1, RST2, WDO Pull-Up Current
RST1, RST2, WDO Output Voltage
RST1, RST2 Timeout Period (t
Watchdog Start Delay Time (t
Watchdog Upper Boundary (t
Watchdog Lower Boundary (t
WDI Pull-Up Current
WDI Voltage Threshold
WDI Low Minimum Pulse Width
WDI High Minimum Pulse Width
WDE Pull-Down Current
WDE Threshold
LT3640
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT3640E is guaranteed to meet performance specifi cations
from 0°C to 125°C junction temperature. Specifi cations over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LT3640I is guaranteed and tested over the full –40°C to 125°C operating
junction temperature range.
4
temperature range, otherwise specifi cations are at T
WDU
DLY
WDL
RST
)
)
)
)
FB
FB
CONDITIONS
SS1 = 0.5V, SS2 = 0.5V
SS1 = 0.6V
SS2 = 0.3V
RST1, RST2, WDO = 0V
I
CPOR = 220pF
CWDT = 820pF
CWDT = 820pF
CWDT = 820pF
WDI = 1.2V
WDE = 2V
RST1
A
= 25°C. V
, I
RST2
The
, I
WDO
IN
l
= 12V, V
denotes the specifi cations which apply over the full operating
= 2mA
Note 3: SW1, SW2 current limit is guaranteed by design and/or correlation
to static test. Slope compensation reduces current limit at higher duty
cycle.
Note 4: The oscillator cycle is extended when DA current exceeds its limit.
DA current limit is fl at over duty cycle.
Note 5: If the SW2 NMOS current exceeds its limit at the start of an
oscillator cycle, the PMOS will not be turned on in the cycle.
Note 6: The QFN switch R
measurement.
Note 7: Absolute maximum voltage at V
nonrepetitive one second transients, and 36V for continuous operation.
IN2
= 3.3V, EN/UVLO = 12V, EN2 = 3.3V, unless otherwise noted.
DS(ON)
l
l
l
l
l
l
is guaranteed by correlation to wafer level
MIN
1.68
0.55
300
300
1.4
0.5
90
89
14
27
5
8
IN
and RUN/SS pin is 55V for
0.85
TYP
150
1.9
9.5
0.7
92
92
20
15
16
32
5
5
2
2
1
MAX
1.15
250
2.5
2.2
0.9
30
30
94
94
30
11
18
35
UNITS
3640p
mV
mV
mV
ms
ms
ms
ms
μA
μA
μA
μA
μs
ns
ns
%
%
V
V

Related parts for LT3640EFE