NCP1392B_09 ONSEMI [ON Semiconductor], NCP1392B_09 Datasheet - Page 19
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NCP1392B_09
Manufacturer Part Number
NCP1392B_09
Description
High-Voltage Half-Bridge Driver with Inbuiltc Oscillator
Manufacturer
ONSEMI [ON Semiconductor]
Datasheet
1.NCP1392B_09.pdf
(21 pages)
implementation using NCP1392 driver. Voltage across
resistor R1 (R4) increases when converter enters light load
conditions. The enable comparator is triggered when
voltage across R1 is higher than Vref EN + Vf(D1) for
connection from Figure 37 (voltage across R4 is higher than
1.24 V for connection from figure 16). IC then prevents
outputs from pulsing until BO terminal voltage decreases
below 1.92 V.
overvoltage protection. When bulk voltage is too high, the
enable input is triggered via BO divider.
devices connected to Rt pin:
Minimum frequency:
Figures 37 and 39
Note that enable comparator serves also as an automatic
Following equations can be used for easy calculations of
IC1
TLV431
R1
R2
C1
R4
R
t
+
R5
Frequency * q
V
Q1
CC
shows
Figure 39. Skip Mode Feature Implementation (Better Accuracy)
R6
R3
3.5 @ k
Voltage
Feedback
skip
C
mode
R
SS
fstart
V
bulk
R
R
feature
http://onsemi.com
upper
lower
(eq. 5)
R
t
BO
Rt
19
I
hyste
Maximum frequency where soft−start begins:
The soft−start duration is set by Css capacitor:
A resistor to set maximum frequency, if the optocoupler is
fully conductive is calculated by the following equation:
The constants in the equations are as follows:
R
(R4)R5)
SW
Version B: k = 244.410
Version D: k = 478.910
R
+ −
fstart
Frequency @ R
+
+
−
+
−
V
V
Frequency @ R
refEN
refBO
High Level for BOdisch time after V
+
−
−
+
GND
NCP1392
C
SS
−3.5 ) V
+
t
3.5 @ k @ R
0.5ms
Filter
Filter
20ms
R
SS
− R
fstart
t
duration
6
6
* R
t
, q = 0.55510
, q = 1.05310
@ q − 3.5 @ k ) k @ V
@ 5
ce_sat
t
@ q * 3.5 @ k
t
@ k @ R
To PFC Delay
CC
to AND gates
to AND gates
ON
3
3
t
(eq. 6)
(eq. 7)
(eq. 8)
ce_sat