NCP1336 ONSEMI [ON Semiconductor], NCP1336 Datasheet - Page 6

• Manufacturer Part Number: NCP1336
• Description: Quasi-Resonant Current Mode Controller for High Power Universal Off-Line Supplies
• Manufacturer: ONSEMI [ON Semiconductor]

ELECTRICAL CHARACTERISTICS
(For typical values T
SUPPLY SECTION
INTERNAL STARTUP CURRENT SOURCE (T
DRIVE OUTPUT
DEMAGNETIZATION INPUT
CURRENT COMPARATOR
Ipeak_VCO Percentage of maximum peak current level at which VCO takes over (Note 4)
3. Minimum value for T
4. The peak current setpoint goes down as the load decreases. It is frozen below Ipeak_VCO (Ipeak = cst)
5. If negative voltage in excess to −300 mV is applied to OPP pin, the current setpoint decrease is no longer guaranteed to be linear.
6. NTC on OTP pin with R = 8.8 kW at 110°C.
VDRV
VDRV
VCC
ICC1
Symbol
VCC
VCC
I
T
I
I
ICC2
ICC3
source
T
T
T
I
VC
C
Limit1
Limit2
I
I
VC
V
T
IC2
IC1
CC1
V
blank
leak
sink
V
dem
I
DEL
T
T
LEB
out
par
IB
Th
th
H
reset
r
f
min
light
H
L
on
high
low
V
V
Internal latch reset level
Internal IC consumption, no output load on DRV pin (Fsw = 10 kHz)
I
220 pF (corresponding to an Fsw of about 20 kHz)
Internal IC consumption, 1 nF output load on pin 9, Fsw = 65 kHz
Internal IC consumption, hiccup phase (VCC
High−voltage current source, V
High−voltage current source, V
V
Leakage current for the high voltage source, V
Output voltage rise−time @ C
Output voltage fall−time @ C
Source current capability at V
Sink current capability at V
DRV pin level at V
capacitor to GND
DRV pin level at V
Input threshold voltage (V
Hysteresis (V
Input clamp voltage
High state (I
Low state (I
Demag propagation delay (V
Internal input capacitance at V
Blanking Delay after t
Timeout after last demag transition
Input Bias Current @ 1 V input level on CS pin
Maximum internal current setpoint – T
Maximum internal current setpoint – T
Propagation delay from current detection to gate OFF state
Leading Edge Blanking Duration
CC1
CC
CC
CC
increasing level at which the current source turns−off
level below which output pulses are stopped
transition level for IC1 to IC2 toggling point (I
for a Feedback Voltage Equal to VH
J
= 25°C, for min/max values T
J
= 125°C.
ZCD(pin)
ZCD(pin)
ZCD(pin)
CC
CC
= −2.0 mA)
= 3.0 mA)
ON
close to VCC
= 28 V with a 1 nF capacitor to GND (Note 3)
increasing)
ZCD(pin)
DRV
ZCD(pin)
L
DRV
L
ZCD(pin)
= 1 nF, 10%−90% of a 12 V output signal
CC
CC
= 10 V
= 1 nF, 10%−90% of a 12 V output signal
J
decreasing)
= 2 V
= 10 V (Note 3)
= 0
min
> 05C) (HV Pin Biased to 60 Vdc)
decreasing from 4 V to −0.3 V)
J
J
J
Rating
with a 33 kW resistor to GND and a 1 nF
= 1 V
= −40°C to +125°C, Max T
= 25°C – OPP pin grounded
from −40°C to 125°C – OPP pin grounded
VCO
http://onsemi.com
min
(internal bias reduction), with C
T
HV(pin)
T
J
< V
J
= −40°C to +125°C
HV
= −5°C to +125°C
CC
= 2.5 mA)
= 500 Vdc
6
< VCC
on
)
J
= 150°C, V
T
CC
=
= 12 V unless otherwise noted)
0.744
−0.9
0.76
Min
150
240
240
0.3
7.6
14
35
15
22
8
−
−
−
−
3
1
−
−
−
−
−
8
−
−
2
4
−
−
0.45
−0.7
5.25
0.02
Typ
300
500
800
150
100
295
295
5.5
1.4
1.8
2.5
0.7
0.8
0.8
15
12
40
25
55
35
10
10
25
9
6
−
−
3
0.856
Max
0.84
550
250
160
350
360
2.0
3.0
0.6
0.9
6.5
16
10
30
75
60
17
90
55
12
28
−
9
−
−
−
0
−
4
−
Unit
mA
mA
mA
mA
mA
mA
mA
mV
mV
mA
mA
pF
mA
ns
ns
ns
ms
ms
ns
ns
%
V
V
V
V
V
V
V
V
V
V