AT17C002 ATMEL [ATMEL Corporation], AT17C002 Datasheet - Page 7
AT17C002
Manufacturer Part Number
AT17C002
Description
FPGA Configuration EEPROM Memory
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT17C002.pdf
(19 pages)
For details of ISP, please refer to the “Programming Specification for Atmel's AT17 and AT17A Series FPGA Configuration
EEPROMs”, available on the Atmel web site, at http://www.atmel.com/atmel/acrobat/doc0437.pdf.
Figure 3. In-System Programming of AT17 Series for PSLI Applications
Notes:
Figure 4. In-System Programming of AT17 Series for Xilinx/Lucent FPGA Applications
Notes:
2281D–12/01
RESET
PROGRAM
1. Reset polarity must be set to active Low.
2. Use of the optional READY pin is not available on the AT17C/LV65/128/256 devices.
1. Reset polarity must be set to active Low.
2. Use of the optional READY pin is not available on the AT17C/LV65/128/256 devices.
3. An internal pull-up resistor is enabled here for DONE.
V
GND
CC
GND
4.7 k
9
AT40K/AT40KAL/AT94K
RESET
M2
M1
M0
PROGRAM
M2
M1
M0
XILINX FPGA
DONE
DATA0
CCLK
CCLK
CON
INIT
INIT
DIN
(3)
V
CC
4.7 k
9
DATA
CLK
CE
RESET/OE
AT17 Series Device
DATA
CLK
CE
RESET/OE
AT17 Series Device
(1)
READY
(1)
SER_EN
READY
SER_EN
4.7 k
(2)
4.7 k
(2)
9
V
9
CC
V
CC
V
CC
V
AT17C/LV002
CC
4.7 k
GND
DATA
SCLK
4.7 k
GND
DATA
SCLK
9
9
1
3
5
7
9
SER_EN
1
3
5
7
9
SER_EN
2
4
6
8
10
2
4
6
8
10
V
V
CC
CC
7