COP424C NSC [National Semiconductor], COP424C Datasheet - Page 11

• Manufacturer Part Number: COP424C
• Description: Single-Chip 1k and 2k CMOS Microcontrollers
• Manufacturer: NSC [National Semiconductor]

Functional Description
The HALT mode is the minimum power dissipation state
Note If the user has selected dual-clock with D0 as external
CKO PIN OPTIONS
a Two-pin oscillator
b One-pin oscillator
OSCILLATOR OPTIONS
There are four basic clock oscillator configurations available
as shown by Figure 8
a Crystal Controlled Oscillator CKI and CKO are connect-
b External Oscillator The external frequency is optionally
Block Diagram
In a crystal controlled oscillator system CKO is used as
an output to the crystal network The HALT mode may be
entered by program control (HALT instruction) which
forces CKO high thus inhibiting the crystal network The
circuit can be awakened only by forcing the RESET pin to
a logic ‘‘0’’ (restart)
If a one-pin oscillator system is chosen two options are
available for CKO
ed to an external crystal The instruction cycle time equals
the crystal frequency optionally divided by 4 8 or 16
divided by 4 8 or 16 to give the instruction cycle time
CKO is the HALT I O port or a general purpose input
CKO can be selected as the HALT I O port In that
case it is an I O flip-flop which is an indicator of the
HALT status An external signal can over-ride this pin
to start and stop the chip By forcing a high level to
CKO the chip will stop as soon as CKI is high and
CKO output will stay high to keep the chip stopped if
the external driver returns to high impedance state
By forcing a low level to CKO the chip will continue
and CKO will stay low
As another option CKO can be a general purpose in-
put read into bit 2 of A (accumulator) upon execution
of an INIL instruction
oscillator (option 30
running with the D0 clock the HALT mode
hardware or software
the user should switch to the CKI clock to HALT Al-
ternatively the user may stop the D0 clock to mini-
mize power
(Crystal) See Figure 9A
(RC or external) See Figure 9B
(Continued)
e
2) AND the COP444C 424C is
will NOT be entered Thus
(Continued)
FIGURE 9A Halt Mode
either
11
Figures 10A and 10B show the clock and timer diagrams
c RC Controlled Oscillator CKI is configured as a single pin
d Dual oscillator By selecting the dual clock option pin D0
Note CTMA instruction is not allowed when chip is running
with and without Dual clock
COP445C AND COP425C 24-PIN PACKAGE OPTION
If the COP444C 424C is bonded in a 24-pin package it be-
comes the COP445C 425C illustrated in Figure 2 Connec-
tion diagrams Note that the COP445C 425C does not con-
tain the four general purpose IN inputs (IN3– IN0) Use of
this option precludes of course use of the IN options in-
terrupt feature external event counter feature and the
Microbus option which uses IN1– IN3 All other options are
available for the COP445C 425C
Note If user selects the 24-pin package options 9 10 19
COP426C 20-PIN PACKAGE OPTION
If the COP425C is bonded as 20-pin device it becomes the
COP426C
COP425C pins except D
Two-Pin Oscillator
RC controlled Schmitt trigger oscillator The instruction
cycle equals the oscillation frequency divided by 4 CKO
is the HALT I O port or a general purpose input
is now a single pin oscillator input Two configurations are
available RC controlled Schmitt trigger oscillator or exter-
nal oscillator
The user may software select between the D0 oscillator
(in that case the instruction cycle time equals the D0
oscillation frequency divided by 4) by setting the D0 latch
high or the CKI (CKO) oscillator by resetting D0 latch low
Note that even in dual clock mode the counter if mask-
programmed as a time-base counter is always connect-
ed to the CKI oscillator
For example the user may connect up to a 1 MHz RC
circuit to D0 for faster processing and a 32 kHz watch
crystal to CKI and CKO for minimum current drain and
time keeping
from D0 clock
and 20 must be selected as a ‘‘0’’ (load to V
IN inputs) See option list
Note that the COP426C contains all the
0
D
1
G
0
and G
TL DD 5259 – 10
1
CC
on the