STK14C88_08 SIMTEK [Simtek Corporation], STK14C88_08 Datasheet - Page 4

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STK14C88_08

Manufacturer Part Number
STK14C88_08
Description
32Kx8 AutoStore nvSRAM
Manufacturer
SIMTEK [Simtek Corporation]
Datasheet
STK14C88
Document Control #ML0014 Rev 2.0
SRAM READ CYCLES #1 & #2
Note g: W and HSB must be high during SRAM READ cycles.
Note h: I/O state assumes E and G <
Note i:
SRAM READ CYCLE #1: Address Controlled
SRAM READ CYCLE #2: E and G Controlled
DQ (DATA OUT)
NO.
10
11
1
2
3
4
5
6
7
8
9
DQ (D ATA OUT)
ADDRESS
27
Feb, 2008
ADDR ESS
Measured ± 200mV from steady state output voltage.
t
t
t
t
t
t
t
t
t
t
t
ELQV
AVAV
AVQV
GLQV
AXQX
ELQX
EHQZ
GLQX
GHQZ
ELICCH
EHICCL
#1, #2
SYMBOLS
g
I
h
h
i
i
CC
,
G
t
E
f
f
ELEH
g
Alt.
t
t
t
t
t
t
t
t
t
t
t
ACS
RC
AA
OE
OH
LZ
HZ
OLZ
OHZ
PA
PS
Chip Enable Access Time
Read Cycle Time
Address Access Time
Output Enable to Data Valid
Output Hold after Address Change
Address Change or Chip Enable to Output Active
Address Change or Chip Disable to Output Inactive
Output Enable to Output Active
Output Disable to Output Inactive
Chip Enable to Power Active
Chip Disable to Power Standby
V
IL
ST AND BY
and
W >
t
ELI CC H
t
t
ELQ X
AXQX
1 0
t
6
t
V
5
AV QV
G L Q X
IH
3
8
; device is continuously selected.
PARAMETER
t
G L QV
4
t
t
EL Q V
E LE H
t
AVQV
1
2
AC T IVE
3
t
4
AVAV
2
g, h
g
DATA VALID
STK14C88-25
MIN
25
5
5
0
0
t
MAX
EHAX
25
25
10
10
10
25
29
DAT A VAL ID
STK14C88-35
MIN
35
5
5
0
0
(V
t
GH Q Z
CC
9
MAX
35
35
15
13
13
35
t
EHQ Z
7
= 5.0V ± 10%)
t
EHI CC L
11
STK14C88-45
MIN
45
5
5
0
0
MAX
45
45
20
15
15
45
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
e

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