STK14C88_08 SIMTEK [Simtek Corporation], STK14C88_08 Datasheet - Page 12

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STK14C88_08

Manufacturer Part Number
STK14C88_08
Description
32Kx8 AutoStore nvSRAM
Manufacturer
SIMTEK [Simtek Corporation]
Datasheet
STK14C88
Document Control #ML0014 Rev 2.0
• Power up boot firmware routines should rewrite
• The V
PREVENTING STORES
The
holding HSB high with a driver capable of sourcing
30mA at a V
power the internal pull-down device that drives HSB
low for 20μs at the onset of a
STK14C88 is connected for AutoStore operation
(system V
on V
the STK14C88 will attempt to pull HSB low; if HSB
doesn’t actually get below V
ing to pull HSB low and abort the
HARDWARE PROTECT
The STK14C88 offers hardware protection against
inadvertent
ing low-voltage conditions. When V
externally initiated
WRITE
AutoStore can be completely disabled by tying V
to ground and applying + 5V to V
AutoStore
initiated by explicit request using either the software
sequence or the HSB pin.
LOW AVERAGE ACTIVE POWER
The STK14C88 draws significantly less current
when it is cycled at times longer than 50ns. Figure 3
shows the relationship between I
the nvSRAM into the desired state (autostore
enabled, etc.). While the nvSRAM is shipped in a
preset state, best practice is to again rewrite the
nvSRAM into the desired state as a safeguard
against events that might flip the bit inadvertently
(program bugs, incoming inspection routines,
etc.).
includes a minimum and a maximum value size.
Best practice is to meet this requirement and not
exceed the max V
internal algorithm calculates V
based on this max Vcap value. Customers that
want to use a larger V
there is extra store charge and store time should
discuss their V
understand any impact on the V
at the end of a t
STORE
CAP
Feb, 2008
s will be inhibited.
) and V
Inhibit mode; in this mode
cap
CC
STORE
OH
function can be disabled on the fly by
connected to V
of at least 2.2V, as it will have to over-
value specified in this datasheet
CC
crosses V
cap
RECALL
operation and
STORE
cap
size selection with Simtek to
value because the nvSRAM
period.
cap
CC
SWITCH
IL
operations and
, the part will stop try-
and a 68μF capacitor
value to make sure
STORE
CC
STORE
SRAM WRITE
on the way down,
cap
STORE
cap
CAP
and
CAP
. This is the
voltage level
charge time
< V
. When the
READ
attempt.
s are only
SWITCH
SRAM
s dur-
cycle
, all
CC
12
time. Worst-case current consumption is shown for
both
perature range, V
enable). Figure 4 shows the same relationship for
WRITE
than 100%, only standby current is drawn when the
chip is disabled. The overall average current drawn
by the STK14C88 depends on the following items:
1)
chip enable; 3) the overall cycle rate for accesses;
4) the ratio of
temperature; 6) the V
CMOS
100
CMOS
100
80
60
40
20
0
80
60
40
20
cycles. If the chip enable duty cycle is less
0
vs.
and
TTL
Figure 3: I
Figure 4: I
READ
50
50
TTL
CC
input levels; 2) the duty cycle of
= 5.5V, 100% duty cycle on chip
s to
cc
input levels (commercial tem-
Cycle Time (ns)
Cycle Time (ns)
100
cc
cc
100
level; and 7) I/O loading.
WRITE
(max) Reads
(max) Writes
150
150
s; 5) the operating
TTL
TTL
CMOS
CMOS
200
200

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