M5M5W816WG-10HI MITSUBISHI [Mitsubishi Electric Semiconductor], M5M5W816WG-10HI Datasheet - Page 2

• Manufacturer Part Number: M5M5W816WG-10HI
• Description: 8388608-BIT (524288-WORD BY 16-BIT) CMOS STATIC RAM
• Manufacturer: MITSUBISHI [Mitsubishi Electric Semiconductor]

1999.1.15
FUNCTION
M5M5W816WG -85L, 10L, 85H, 10H
BLOCK DIAGRAM
bit. These devices operate on a single +1.8~2.7V power
supply, and are directly TTL compatible to both input and
output. Its fully static circuit needs no clocks and no refresh,
and makes it useful.
the device control inputs BC1 , BC2 , S1, S2 , W and OE.
Each mode is summarized in the function table.
overlaps with the low level BC1 and/or BC2 and the low level
S1 and the high level S2. The address(A0~A18) must be set
up before the write cycle and must be stable during the entire
cycle.
and OE at a low level while BC1 and/or BC2 and S1 and S2
are in an active state(S1=L,S2=H).
active stage , upper-byte are in a selectable mode in which
both reading and writing are enabled, and lower-byte are in a
non-selectable mode. And when setting BC2 at a high level
and other pins are in an active stage, lower-byte are in a
selectable mode and upper-byte are in a non-selectable
mode.
The M5M5W816WG is organized as 524288-words by 16-
A read operation is executed by setting W at a high level
When setting BC1 at the high level and other pins are in an
A write operation is executed whenever the low level W
The operation mode are determined by a combination of
BC2
BC1
OE
A
S1
S2
A
W
A
A
18
17
0
1
Ver. 0.1
-85LI, 10LI, 85HI, 10HI
MEMORY ARRAY
524288 WORDS
x 16 BITS
MITSUBISHI ELECTRIC
GENERATOR
CLOCK
8388608-BIT (524288-WORD BY 16-BIT) CMOS STATIC RAM
FUNCTION TABLE
or S2 at a low level, the chips are in a non-selectable mode in
which both reading and writing are disabled. In this mode, the
output stage is in a high-impedance state, allowing OR-tie with
other chips and memory expansion by BC1, BC2 and S1, S2.
typical), and the memory data can be held at +1V power supply,
enabling battery back-up operation during power failure or
power-down operation in the non-selected mode.
When setting BC1 and BC2 at a high level or S1 at a high level
S1
H
L
H
X
L
L
L
L
L
L
L
L
L
The power supply current is reduced as low as 0.1µA(25°C,
S2
L
L
H
X
H
H
H
H
H
H
H
H
H
BC1 BC2
X
X
X
H
L
H
H
L
L
H
L
L
L
-
X
X
X
H
H
H
H
L
L
L
L
L
L
W
X
X
X
X
L
H
H
L
H
H
L
H
H
OE
X
X
X
X
X
H
H
L
X
L
X
L
H
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change
Non selection
Non selection
Non selection
Non selection
Mode
Write
Read
Write
Read
Write
Read
DQ1~8
High-Z
High-Z
High-Z
High-Z High-Z
High-Z High-Z
High-Z
High-Z
High-Z
High-Z
Din
Dout
Din
Dout
MITSUBISHI LSIs
GND
Vcc
DQ
DQ
DQ
DQ
DQ9~16
16
High-Z Standby
High-Z Standby
High-Z Standby
High-Z
High-Z
High-Z
High-Z
1
8
9
Din
Dout
Din
Dout
Standby
Active
Active
Active
Active
Active
Active
Active
Active
Active
Icc
2