HYB39S64160AT-10 SIEMENS [Siemens Semiconductor Group], HYB39S64160AT-10 Datasheet - Page 48

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HYB39S64160AT-10

Manufacturer Part Number
HYB39S64160AT-10
Description
64 MBit Synchronous DRAM
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
20.1 Full Page Read Cycle
DQM
Addr
CKE
RAS
CAS
CLK
BS
AP
WE
DQ
CS
High
Hi-Z
Command
Activate
Bank A
RAx
RAx
T0
t
CK2
Command
T1
Bank A
Read
CAx
T2
Command
T3
Activate
Bank B
RBx
RBx
Ax
T4
Ax+1
T5
The burst counter wraps
page address back to zero
Ax+2
from the highest order
during this time interval.
T6
Ax-2
T
Ax-1
T
Command
Bank B
Read
CBx
Ax
T
Ax+1
Full Page burst operation does not
terminate when the burst length is satisfied;
the burst counter increments and continues
bursting beginning with the starting address.
T
Bx
T
Bx+1
T
Bx+2
T
Bx+3
T
Bx+4
T
Burst Stop
Command
Bx+5
Burst Length = Full Page, CAS Latency = 2
T
Precharge
Command
Bank B
Bx+6
T
t
RP
T
Command
Activate
Bank B
RBy
RBy
T
T
T
T

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