CY14B101K CYPRESS [Cypress Semiconductor], CY14B101K Datasheet - Page 5

• Manufacturer Part Number: CY14B101K
• Description: 1 Mbit (128K x 8) nvSRAM With Real-Time Clock
• Manufacturer: CYPRESS [Cypress Semiconductor]

Table 1. Mode Selection
Notes
Document #: 001-06401 Rev. *E
1. The six consecutive address locations must be in the order listed. WE must be HIGH during all six cycles to enable a nonvolatile cycle.
2. While there are 17 address lines on the CY14B101K, only the lower 16 lines are used to control software modes.
3. IO state depends on the state of OE. The IO table shown is based on OE Low.
CE
H
L
L
L
L
L
L
WE
H
H
H
H
H
X
L
OE
X
X
L
L
L
L
L
PRELIMINARY
A15 – A0
0xB1C7
0xB1C7
0xB1C7
0xB1C7
0x7C1F
0x7C1F
0x7C1F
0x8FC0
0x7C1F
0x4C63
0x4E38
0x83E0
0x703F
0x8B45
0x4E38
0x83E0
0x703F
0x4B46
0x4E38
0x83E0
0x703F
0x4E38
0x83E0
0x703F
X
X
X
WRITE SRAM
READ SRAM
READ SRAM
READ SRAM
READ SRAM
READ SRAM
READ SRAM
READ SRAM
READ SRAM
READ SRAM
READ SRAM
Not Selected
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Nonvolatile
Nonvolatile
Autostore
Autostore
Disable
Enable
Recall
Mode
Store
Output High-Z
Output High-Z
Output High-Z
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Input Data
IO
CY14B101K
Active I
Active
Active
Active
Standby
Page 5 of 24
Power
Active
Active
CC2
[1, 2, 3]
[1, 2, 3]
[1, 2, 3]
[1, 2, 3]
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