M48Z35-70MH1 STMICROELECTRONICS [STMicroelectronics], M48Z35-70MH1 Datasheet - Page 8

• Manufacturer Part Number: M48Z35-70MH1
• Description: 256 Kbit 32Kb x8 ZEROPOWER SRAM
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

M48Z35, M48Z35Y
Table 10. Write Mode AC Characteristics
(T
Note: 1. C
DATA RETENTION MODE
With valid V
as a conventional BYTEWIDE™ static RAM.
Should the supply voltage decay, the RAM will au-
tomatically power-fail deselect, write protecting it-
self when V
V
pedance, and all inputs are treated as "don't care."
Note: A power failure during a write cycle may cor-
rupt data at the currently addressed location, but
does not jeopardize the rest of the RAM's content.
At voltages below V
sured the memory will be in a write protected state,
provided the V
M48Z35/35Y may respond to transient noise
spikes on V
during the time the device is sampling V
8/18
PFD
A
= 0 to 70 °C or –40 to 85 °C; V
t
t
2. If E goes low simultaneously with W going low, the outputs remain in the high impedance state.
WHQX
(min) window. All outputs become high im-
WLQZ
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
WLWH
WHAX
DVWH
WHDX
AVWH
AVWL
EHAX
DVEH
EHDX
ELEH
AVEH
AVAV
AVEL
L
= 5pF (see Figure 4).
(1, 2)
(1, 2)
CC
CC
CC
CC
that reach into the deselect window
applied, the M48Z35/35Y operates
fall time is not less than t
falls within the V
Write Cycle Time
Address Valid to Write Enable Low
Address Valid to Chip Enable Low
Write Enable Pulse Width
Chip Enable Low to Chip Enable High
Write Enable High to Address Transition
Chip Enable High to Address Transition
Input Valid to Write Enable High
Input Valid to Chip Enable High
Write Enable High to Input Transition
Chip Enable High to Input Transition
Write Enable Low to Output Hi-Z
Address Valid to Write Enable High
Address Valid to Chip Enable High
Write Enable High to Output Transition
PFD
(min), the user can be as-
CC
= 4.75V to 5.5V or 4.5V to 5.5V)
CC
Parameter
PFD
. There-
(max),
F
. The
fore, decoupling of the power supply lines is rec-
ommended.
When V
switches power to the internal battery which pre-
serves data. The internal button cell will maintain
data in the M48Z35/35Y for an accumulated peri-
od of at least 10 years (at 25°C) when V
than V
As system power returns and V
V
supply is switched to external V
tion continues until V
t
t
For more information on Battery Storage Life refer
to the Application Note AN1012.
REC
REC
SO
, the battery is disconnected, and the power
(min). Normal RAM operation can resume
after V
SO
CC
.
CC
drops below V
exceeds V
M48Z35 / M48Z35Y
Min
70
50
55
30
30
60
60
0
0
0
5
5
5
0
CC
reaches V
PFD
-70
SO
(max).
, the control circuit
Max
CC
25
CC
. Write protec-
PFD
rises above
(min) plus
CC
Unit
is less
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns