M95128-W STMICROELECTRONICS [STMicroelectronics], M95128-W Datasheet - Page 10

• Manufacturer Part Number: M95128-W
• Description: 128 Kbit serial SPI bus EEPROM with high speed clock
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Signal description
3.6
3.7
3.7.1
3.7.2
3.7.3
10/44
Write Protect (W)
The main purpose of this input signal is to freeze the size of the area of memory that is
protected against Write instructions (as specified by the values in the BP1 and BP0 bits of
the Status Register).
This pin must be driven either High or Low, and must be stable during all write instructions.
Supply voltage (V
Operating supply voltage V
Prior to selecting the memory and issuing instructions to it, a valid and stable V
within the specified [V
Table
V
V
This voltage must remain stable and valid until the end of the transmission of the instruction
and, for a Write instruction, until the completion of the internal write cycle (t
Power-up conditions
When the power supply is turned on, V
time, the Chip Select (S) line is not allowed to float but should follow the V
therefore recommended to connect the S line to V
In addition, the Chip Select (S) input offers a built-in safety feature, as it is edge-sensitive as
well as level-sensitive: after power-up, the device does not become selected until a falling
edge has first been detected on Chip Select (S). This ensures that Chip Select (S) must
have been high, prior to going low to start the first operation.
The V
Device reset
In order to prevent inadvertent Write operations during power-up (continuous rise of V
power on reset (POR) circuit is included. At power-up, the device does not respond to any
instruction until the V
lower than the minimum V
When V
CC
CC
/V
line with a suitable capacitor (usually of the order of 10 nF to 100 nF) close to the
Standby Power mode
deselected (at next power-up, a falling edge is required on Chip Select (S) before any
instruction can be started).
not in the Hold Condition
Status register:
–
–
–
9). In order to secure a stable DC supply voltage, it is recommended to decouple the
CC
SS
CC
package pins.
rise time must not vary faster than 1 V/µs.
the Write Enable Latch (WEL) is reset to 0
the Write In Progress (WIP) is reset to 0
The SRWD, BP1 and BP0 bits of the Status Register are unchanged from the
previous power-down (they are non-volatile bits)
passes over the POR threshold, the device is reset and is in the following state:
CC
CC
has reached the power on reset threshold voltage (this threshold is
(min), V
CC
CC
operating voltage defined in
)
CC
CC
(max)] range must be applied (see
CC
continuously rises from V
CC
via a suitable pull-up resistor.
Table
M95128, M95128-W, M95128-R
7,
Table 8
SS
Table
to V
CC
and
CC
W
7,
).
voltage, it is
. During this
Table
Table 8
CC
voltage
9).
CC
and
), a