M95128-R STMICROELECTRONICS [STMicroelectronics], M95128-R Datasheet - Page 10

• Manufacturer Part Number: M95128-R
• Description: 128 Kbit Serial SPI bus EEPROM with high speed clock
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Signal description
3.6
3.7
3.7.1
3.7.2
3.7.3
10/41
Write Protect (W)
The main purpose of this input signal is to freeze the size of the area of memory that is
protected against Write instructions (as specified by the values in the BP1 and BP0 bits of
the Status Register).
This pin must be driven either High or Low, and must be stable during all write instructions.
Supply voltage (V
Operating supply voltage V
Prior to selecting the memory and issuing instructions to it, a valid and stable V
must be applied: this voltage must be a DC voltage within the specified [V
V
supply voltage, it is recommended to decouple the V
of the order of 10nF to 100nF) close to the V
The V
instruction and, for a Write instruction, until the completion of the internal write cycle (t
Power-up conditions
When the power supply is turned on, V
Select (S) signal is not allowed to float and must follow the V
therefore be connected to V
In addition, the Chip Select (S) input offers a built-in safety feature, as it is both edge
sensitive and level sensitive. Practically this means that after power-up, the device cannot
become selected until a falling edge has first been detected on Chip Select (S). So the Chip
Select (S) signal must first have been High and then gone Low before the first operation can
be started.
Internal device reset
In order to prevent inadvertent Write operations during Power-up, a Power On Reset (POR)
circuit is included. At Power-up (continuous rise of V
instruction until the V
is lower than the minimum V
parameters).
When V
state:
CC
(max)] range, as defined in
in Standby Power mode
deselected (at next Power-up, a falling edge is required on Chip Select (S) before any
instructions can be executed)
not in the Hold Condition Status Register state:
–
–
CC
CC
voltage must remain stable and valid until the end of the transmission of the
the Write Enable Latch (WEL) bit is reset to 0
the Write In Progress (WIP) bit is reset to 0.
The SRWD, BP1 and BP0 bits of the Status Register are at the same logic level as
when the device was last powered down (they are non-volatile bits).
has passed the POR threshold voltage, the device is reset and in the following
CC
has reached the Power On Reset threshold voltage (this threshold
CC
CC
CC
)
via a suitable pull-up resistor.
Table
operating voltage defined in
CC
7,
CC
Table 8
rises from V
CC
/V
and
SS
CC
CC
Table
package pins.
SS
line with a suitable capacitor (usually
), the device will not respond to any
to V
9. In order to secure a stable DC
M95128, M95128-W, M95128-R
Section 9: DC and AC
CC
CC
voltage. The S line should
. During this time, the Chip
CC
(min),
CC
voltage
W
).