M95010-BN3 STMICROELECTRONICS [STMicroelectronics], M95010-BN3 Datasheet - Page 19
M95010-BN3
Manufacturer Part Number
M95010-BN3
Description
4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.M95010-BN3.pdf
(37 pages)
- Current page: 19 of 37
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POWER-UP AND DELIVERY STATE
Power-up State
After Power-up, the device is in the following state:
–
–
–
–
–
The BP1 and BP0 bits of the Status Register are
unchanged from the previous power-down (they
are non-volatile bits).
low power Standby Power mode
deselected (after Power-up, a falling edge is
required on Chip Select (S) before any
instructions can be started).
not in the Hold Condition
the Write Enable Latch (WEL) is reset to 0
Write In Progress (WIP) is reset to 0
Initial Delivery State
The device is delivered with the memory array set
at all 1s (FFh). The Block Protect (BP1 and BP0)
bits are initialized to 0.
M95040, M95020, M95010
19/37
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