AT88SC1616C-WI ATMEL [ATMEL Corporation], AT88SC1616C-WI Datasheet - Page 3
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AT88SC1616C-WI
Manufacturer Part Number
AT88SC1616C-WI
Description
CryptoMemory 16 Kbit
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT88SC1616C-WI.pdf
(20 pages)
Pin Descriptions
Supply Voltage (V
Clock (SCL/CLK)
Reset (RST)
Serial Data (SDA/IO)
2030IS–SMIC–04/07
CC
)
The V
In the asynchronous T = 0 protocol, the SCL/CLK input is used to provide the device
with a carrier frequency f. The nominal length of one bit emitted on I/O is defined as an
“elementary time unit” (ETU) and is equal to 372/f. When the synchronous protocol is
used, the SCL/CLK input is used to positive edge clock data into the device and nega-
tive edge clock data out of the device.
The AT88SC1616C provides an ISO 7816-3 compliant asynchronous answer to reset
sequence. When the reset sequence is activated, the device will output the data pro-
grammed into the 64-bit answer-to-reset register. An internal pull-up on the RST input
pad allows the device to be used in synchronous mode without bonding RST. The
AT88SC1616C does not support the synchronous answer-to-reset sequence.
The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and
may be wired with any number of other open drain or open collector devices. An exter-
nal pull-up resistor should be connected between SDA and V
resistor and the system capacitance loading the SDA bus will determine the rise time of
SDA. This rise time will determine the maximum frequency during read operations. Low
value pull-up resistors will allow higher frequency operations while drawing higher aver-
age power. SDA/IO information applies to both asynchronous and synchronous
protocols.
When the synchronous protocol is used, the SCL/CLK input is used to positive edge
clock data into the device and negative edge clock data out of the device.
CC
input is a 2.7V to 5.5V positive voltage supplied by the host.
AT88SC1616C
CC
. The value of this
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