AT88SC1616C-WI ATMEL [ATMEL Corporation], AT88SC1616C-WI Datasheet - Page 11
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AT88SC1616C-WI
Manufacturer Part Number
AT88SC1616C-WI
Description
CryptoMemory 16 Kbit
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT88SC1616C-WI.pdf
(20 pages)
Communication Security Modes
Table 4. Communication Security Modes
Note:
Security Options
Anti-tearing
Write Lock
2030IS–SMIC–04/07
Mode
Standard
Authentication
Encryption
1. Configuration data include viewable areas of the Configuration Zone except the passwords:
MDC: Modification Detection Code
MAC: Message Authentication Code.
Configuration Data
Clear
Clear
Clear
-SDA
-SCL
Figure 11. Synchronous 2-wire Protocol
Note:
Communications between the device and host operate in three basic modes. Standard
mode is the default mode for the device after power-up. Authentication mode is acti-
vated by a successful authentication sequence. Encryption mode is activated by a
successful encryption activation following a successful authentication.
In the event of a power loss during a write cycle, the integrity of the device’s stored data
may be recovered. This function is optional: the host may choose to activate the anti-
tearing function, depending on application requirements. When anti-tearing is active,
write commands take longer to execute, since more write cycles are required to com-
plete them, and data are limited to eight bytes.
Data are written first to a buffer zone in EEPROM instead of the intended destination
address, but with the same access conditions. The data are then written in the required
location. If this second write cycle is interrupted due to a power loss, the device will
automatically recover the data from the system buffer zone at the next power-up.
In 2-wire mode, the host is required to perform ACK polling for up to 8 ms after write
commands when anti-tearing is active. At power-up, the host is required to perform ACK
polling, in some cases for up to 2 ms, in the event that the device needs to carry out the
data recovery process.
If a user zone is configured in the write lock mode, the lowest address byte of an 8-byte
page constitutes a write access byte for the bytes of that page.
Example: The write lock byte at $080 controls the bytes from $080 to $087.
RST
V cc
(1)
Five clock pulses must be sent before the first command is issued.
1
User Data
Encrypted
Clear
Clear
2
3
4
5
Passwords
Encrypted
Encrypted
Clear
AT88SC1616C
Data Integrity Check
MDC
MAC
MAC
(1)
(1)
(1)
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