AT88SA100S-SH-CZ-T ATMEL [ATMEL Corporation], AT88SA100S-SH-CZ-T Datasheet - Page 12

• Manufacturer Part Number: AT88SA100S-SH-CZ-T
• Description: Atmel CryptoAuthentication Battery Authentication Chip
• Manufacturer: ATMEL [ATMEL Corporation]

5.6
6.
Byte and Bit Ordering
The AT88SA100S is a little-endian chip:
Commands
The command packet is broken down in the following way:
If a command fails because the CRC within the block is incorrect, the opcode is invalid or one of the parameters is illegal, then
immediately after t
of that byte will be either 0x0F or 0xFF depending on the source of the error. See Section 5.1.2.
If a command is received successfully then after the appropriate execution delay the system will be able to retrieve the output
block as described in the individual command descriptions below.
In the individual command description tables below, the size column describes the number of bytes in the parameter
documented in each particular row. The total size of the block for each of the commands is fixed, though that value is different
for each command. If the block size for a particular command is incorrect, the chip will not attempt the command execution
and return an error.
Byte
0
1
2-3
4 +
•
•
•
All multi-byte aggregate elements within this spec are treated as arrays of bytes and are processed in the order
Data is transferred to/from the AT88SA100S least significant bit first on the bus
In this document, the most significant bit appears towards the left hand side of the page
received
Name
Opcode
Param1
Param2
Data
PARSE
the system will be able to retrieve an error response block containing a single byte packet. The value
Meaning
The command code
The first parameter – always present
The second parameter – always present
Optional remaining input data
Atmel AT88SA100S [DATASHEET]
8558F−CRYPTO−9/11
12