AT24HC02B-10PU-1.8 ATMEL [ATMEL Corporation], AT24HC02B-10PU-1.8 Datasheet - Page 7

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AT24HC02B-10PU-1.8

Manufacturer Part Number
AT24HC02B-10PU-1.8
Description
Utilizes Different Array Protection Compared
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Figure 4. Bus Timing
Figure 5. Write Cycle Timing
Notes:
5134A–SEEPR–9/05
SDA
SCL
1. The write cycle time t
WORDn
8th BIT
WR
is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle.
ACK
1. Clock up to 9 cycles
2. Look for SDA high in each cycle while SCL is high
3. Create a start condition as SDA is high.
CONDITION
STOP
t
wr
(1)
CONDITION
START
AT24HC02B
7

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