SSTL16857DGG PHILIPS [NXP Semiconductors], SSTL16857DGG Datasheet - Page 5

• Manufacturer Part Number: SSTL16857DGG
• Description: 14-bit SSTL_2 registered driver with differential clock inputs
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
TIMING REQUIREMENTS
Over recommended operating conditions; T
SWITCHING CHARACTERISTICS
Over recommended operating conditions; T
Class I, V
1999 Sep 30
SYMBOL
14-bit SSTL_2 registered driver with
differential clock inputs
f
clock
t
t
t
SYMBOL
t
t
su
w
h
PLH
f
t
max
PHL
REF
/t
PHL
= V
Clock frequency
Pulse duration, CLK, CLK HIGH or LOW
Setup time
Setup time
Hold time
FRONT SIDE
BACK SIDE
TT
= V
Maximum clock frequency
CLK and CLK
RESET
DDQ
PARAMETER
x 0.5 and C
(INPUT)
(INPUT)
184/200-pin DDR SDRAM DIMM
FROM
CBT
L
= 10pF (unless otherwise noted) (see Figure 1)
amb
amb
CBT
= 0 C to +70 C (unless otherwise noted) (see Figure 1)
= 0 C to +70 C; V
CBT
The PLL clock distribution device and SSTL registered drivers reduce
signal loads on the memory controller and prevent timing delays and
waveform distortions that would cause unreliable operation
RESET HIGH before CLK , CLK
SSTL16857
CBT
Data before CLK , CLK
TEST CONDITIONS
DDQ
(OUTPUT)
(OUTPUT)
TO
CBT
= 2.3 – 2.7V and V
Q
Q
5
SSTL16857
CBT
CBT
V
CC
MIN
200
PCK857
1.0
2.0
DDQ
= 2.5V 0.2V
LIMITS
CBT
does not exceed V
V
CC
MIN
1.0
0.8
0.8
0.5
MAX
3.1
5.0
CBT
= 2.5V 0.2V
MAX
V
200
CC
MIN
200
0.7
1.4
CBT3857 (9)
LIMITS
CC.
= 3.3V 0.3V
SW00393
LIMITS
V
CC
MIN
1.0
0.9
1.0
0.5
MAX
SSTL16857
2.6
4.0
= 3.3V 0.3V
Product specification
MAX
200
UNIT
MHz
ns
ns
UNIT
MHz
ns
ns
ns
ns