N74F169N PHILIPS [NXP Semiconductors], N74F169N Datasheet - Page 2

• Manufacturer Part Number: N74F169N
• Description: 4-bit up/down binary synchronous counter
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
FEATURES
DESCRIPTION
The 74F169 is a 4-bit synchronous, presettable Modulo 16 up/down
counter featuring an internal carry look-ahead for applications in
high-speed counting designs. Synchronous operation is provided by
having all flip-flops clocked simultaneously so that the outputs
change coincident with each other when instructed by the Count
Enable inputs and internal gating. This mode of operation eliminates
the output spikes which are normally associated with asynchronous
(ripple clock) counters. A buffered clock input triggers the flip-flops
on the Low-to-High transition of the clock.
The counter is fully programmable; that is, the outputs may be
preset to either level.
Presetting is synchronous with the clock and takes place regardless
of the levels of the Count Enable inputs. A Low level on the Parallel
Enable (PE) input disables the counter and causes the data at the
D
transition of the clock.
The direction of counting is controlled by the Up/Down (U/D) input; a
High will cause the count to increase, a Low will cause the count to
decrease.
The carry look-ahead circuitry provides for n-bit synchronous
applications without additional gating. Instrumental in accomplishing
this function are two Count Enable inputs (CET
Terminal Count (TC) output. Both Count Enable inputs must be Low
to count. The CET input is fed forward to enable the TC output. The
TC output thus enabled will produce a Low output pulse with a
duration approximately equal to the High level portion of the Q
output. The Low level TC pulse is used to enable successive
cascaded stages.
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
NOTE: One (1.0) FAST Unit Load (U.L.) is defined as: 20 A in the High state and 0.6mA in the Low state.
1996 Jan 05
n
D
CEP
CET
CP
PE
U/D
Q
TC
Synchronous counting and loading
Up/Down counting
Modulo 16 binary counter
Two Count Enable inputs for n-bit cascading
Positive edge-triggered clock
Built-in carry look-ahead capability
Presettable for programmable operation
4-bit up/down binary synchronous counter
input to be loaded into the counter on the next Low-to-High
0
0
- D
- Q
3
3
PINS
Parallel data inputs
Count Enable parallel input (active Low)
Count Enable Trickle input (active Low)
Clock input (active rising edge)
Parallel Enable input (active Low)
Up/Down count control input
Flip-flop outputs
Terminal count output (active Low)
,
CEP) and a
DESCRIPTION
0
2
PIN CONFIGURATION
ORDERING INFORMATION
74F169
16-pin plastic DIP
16-pin plastic SO
TYPE
DESCRIPTION
GND
CEP
U/D
TYPICAL f
CP
D
D
D
D
0
1
2
3
115MHz
1
2
3
4
5
6
7
8
COMMERCIAL RANGE
HIGH/LOW
74F(U.L.)
T
MAX
1.0/1.0
1.0/1.0
1.0/2.0
1.0/1.0
1.0/1.0
1.0/1.0
amb
50/33
50/33
V
ORDER CODE
CC
N74F169N
N74F169D
= 0 C to +70 C
= 5V 10%,
SF00766
16
15
14
13
12
11
10
9
SUPPLY CURRENT
V
TC
Q
Q
Q
Q
CET
PE
CC
0
1
2
3
Product specification
TYPICAL
(TOTAL)
LOAD VALUE
853–0350 16190
35mA
1.0mA/20mA
1.0mA/20mA
20 A/0.6mA
20 A/0.6mA
20 A/1.2mA
20 A/0.6mA
20 A/0.6mA
20 A/0.6mA
HIGH/LOW
74F169
SOT109-1
SOT38-4
DWG #
PKG