74ABT648DB PHILIPS [NXP Semiconductors], 74ABT648DB Datasheet - Page 2

• Manufacturer Part Number: 74ABT648DB
• Description: Octal transceiver/register, inverting 3-State
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
FEATURES
DESCRIPTION
The 74ABT648 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
QUICK REFERENCE DATA
ORDERING INFORMATION
PIN CONFIGURATION
24-Pin Plastic DIP
24-Pin plastic SO
24-Pin Plastic SSOP Type II
24-Pin Plastic TSSOP Type I
1998 Jun 08
Combines 74ABT245 and 74ABT374 type functions in one device
Independent registers for A and B buses
Multiplexed real-time and stored data
Output capability: +64mA/–32mA
Power-up 3-state
Power-up reset
Live insertion/extraction permitted
Latch-up protection exceeds 500mA per Jedec Std 17
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
Octal bus transceiver/register, inverting (3-State)
SYMBOL
t
t
I
C
C
CCZ
PLH
PHL
I/O
IN
PACKAGES
CPAB
GND
SAB
Propagation delay
An to Bn or Bn to An
Input capacitance
CP, S, OE, DIR
I/O capacitance
Total supply current
DIR
A0
A1
A2
A3
A4
A5
A6
A7
10
12
11
1
2
3
4
5
6
7
8
9
PARAMETER
TEMPERATURE RANGE
24
23
22
21
20
19
18
17
16
15
14
13
SA00082
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
V
CPBA
SBA
OE
B0
B1
B2
B3
B4
B5
B6
B7
CC
C
V
Outputs disabled;
V
Outputs disabled; V
OUTSIDE NORTH AMERICA
I
O
L
= 0V or V
= 50pF; V
= 0V or V
2
The 74ABT648 transceiver/register consists of bus transceiver
circuits with inverting 3-State outputs, D-type flip-flops, and control
circuitry arranged for multiplexed transmission of data directly from
the input bus or the internal registers. Data on the A or B bus will be
clocked into the registers as the appropriate clock pin goes High.
Output Enable (OE) and DIR pins are provided to control the
transceiver function. In the transceiver mode, data present at the
high impedance port may be stored in either the A or B register or
both.
The Select (SAB, SBA) pins determine whether data is stored or
transferred through the device in real–time. The DIR determines
which bus will receive data when the OE is active (Low). In the
isolation mode (OE = High), data from Bus A may be stored in the B
register and/or data from Bus B may be stored in the A register.
Outputs from real-time, or stored registers will be inverted. When an
output function is disabled, the input function is still enabled and
may be used to store and transmit data. Only one of the two buses,
A or B may be driven at a time. The examples on the next page
demonstrate the four fundamental bus management functions that
can be performed with the 74ABT648.
PIN DESCRIPTION
74ABT648 PW
74ABT648 DB
74ABT648 N
74ABT648 D
PIN NUMBER
20, 19, 18, 17,
T
16, 15, 14, 13
amb
8, 9, 10, 11
CC
4, 5, 6, 7,
CC
CC
1, 23
2, 22
CONDITIONS
= 25 C; GND = 0V
21
12
24
= 5V
3
CC
=5.5V
SAB / SBA
SYMBOL
A0 – A7
B0 – B7
CPAB /
CPBA
GND
DIR
V
OE
CC
NORTH AMERICA
74ABT648PW DH
74ABT648 DB
74ABT648 N
74ABT648 D
A to B clock input / B to A clock
input
A to B select input / B to A select
input
Direction control input
Data inputs/outputs (A side)
Data inputs/outputs (B side)
Output enable input (active-Low)
Ground (0V)
Positive supply voltage
TYPICAL
FUNCTION
110
Product specification
5.9
74ABT648
4
7
DWG NUMBER
853–1613 19516
SOT222-1
SOT137-1
SOT340-1
SOT355-1
UNIT
pF
pF
ns
A