ADCMP580 AD [Analog Devices], ADCMP580 Datasheet - Page 6

• Manufacturer Part Number: ADCMP580
• Description: Ultrafast SiGe Voltage Comparator
• Manufacturer: AD [Analog Devices]

Preliminary Technical Data
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 3. Pin Descriptions
Pin No.
1
2
3
4
5, 16
6
7
8
9, 12
10
11
13
14
15
Heatsink
V
V
Figure 2. ADCMP580 Pin Configuration
V
V
TP
TN
N
P
1
2
3
4
Mnemonic
V
V
V
V
V
LE
LE
V
GND/V
Q
Q
V
HYS
GND
N/C
ADCMP580
(Not to Scale)
TP
P
N
TN
CCI
TT
EE
TOP VIEW
PIN 1
INDICATOR
CCO
12 GND
11 Q
10
9 GND
Description
Termination Resistor Return Pin for VP Input.
Noninverting Analog Input.
Inverting Analog Input.
Termination Resistor Return Pin for VN Input.
Positive Supply Voltage.
Latch Enable Input Pin, Inverting Side. In compare mode (LE = low), the output tracks changes at the input of the
comparator. In latch mode (LE = high), the output reflects the input state just prior to the comparator’s being
placed into latch mode. LE must be driven in compliment with LE.
Latch Enable Input Pin, Noninverting Side. In compare mode (LE = high), the output tracks changes at the input of
the comparator. In latch mode (LE = low), the output reflects the input state just prior to the comparator’s being
placed into latch mode. LE must be driven in compliment with LE.
Termination Return Pin for the LE/LE Input Pins.
For the ADCMP580 (CML output stage), this pin should be connected to the GND ground.
For the ADCMP581 (ECL output stage), this pin should be connected to the –2 V termination potential.
For the ADCMP582 (PECL output stage), this pin should be connected to the V
Digital Ground Pin/Positive Logic Power Supply Terminal.
For the ADCMP580/ADCMP581, this pin should be connected to the GND pin.
For the ADCMP582, this pin should be connected to the positive logic power V
Inverting Output. Q is logic low if the analog voltage at the noninverting input, V
voltage at the inverting input, V
(Pins 6 to 7) for more information.
Noninverting Output. Q is logic high if the analog voltage at the noninverting input, V
voltage at the inverting input, VN, provided that the comparator is in compare mode. See the LE/LE descriptions
(Pins 6 to 7) for more information.
Negative Power Supply.
Hysteresis Control. Leave this pin disconnected for zero hysteresis. Connect this pin to the VEE supply with a
suitably sized resistor to add the desired amount of hysteresis. Refer to Figure 9 for proper sizing of the HYS
hysteresis control resistor.
Analog Ground.
The metallic back surface of the package is not electrically connected to any part of the circuit. It can be left
floating for optimal electrical isolation between the package handle and the substrate of the die. It can also be
soldered to the application board if improved thermal and/or mechanical stability is desired.
Q
V
V
Figure 3. ADCMP581 Pin Configuration
V
V
TP
TN
P
N
1
2
3
4
Rev. PrA | Page 6 of 16
ADCMP581
(Not to Scale)
N
TOP VIEW
, provided that the comparator is in compare mode. See the LE/LE descriptions
PIN 1
INDICATOR
12 GND
11 Q
10
9 GND
Q
ADCMP580/ADCMP581/ADCMP582
V
V
Figure 4. ADCMP582 Pin Configuration
V
V
TN
TP
N
P
1
2
3
4
CCO
CCO
ADCMP582
(Not to Scale)
TOP VIEW
P
– 2 V termination potential.
, is greater than the analog
PIN 1
INDICATOR
supply.
P
, is greater than the analog
12 V
11 Q
10
9 V
Q
CCO
CCO