ADCMP572BCP AD [Analog Devices], ADCMP572BCP Datasheet

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ADCMP572BCP

Manufacturer Part Number
ADCMP572BCP
Description
Ultrafast 3.3 V Single-Supply Comparators
Manufacturer
AD [Analog Devices]
Datasheet

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Preliminary Technical Data
FEATURES
3.3 V/5.2 V single-supply operation
150 ps propagation delay
15 ps overdrive and slew rate dispersion
8 GHz equivalent input risetime bandwidth
80 ps minimum pulse width
35 ps typical output rise/fall
10 ps deterministic jitter (DJ)
200 fs random jitter (RJ)
On-chip terminations at both input pins
Robust inputs with no output phase reversal
Resistor programmable hysteresis
Differential latch control
Power supply rejection > 70 dB
APPLICATIONS
Automatic test equipment (ATE)
High speed instrumentation
Pulse spectroscopy
Medical imaging and diagnostics
High speed line receivers
Threshold detection
Peak and zero-crossing detectors
High speed trigger circuitry
Clock and data signal restoration
GENERAL DESCRIPTION
The ADCMP572/ADCMP573 are ultrafast comparators
fabricated on Analog Devices, Inc. ’ s proprietary XFCB3 Silicon
Germanium (SiGe) bipolar process. The ADCMP572 features
CML output drivers, and the ADCMP573 features reduced
swing PECL (RSPECL) output drivers.
Both devices offer 150 ps propagation delay and 100 ps
minimum pulse width for 10 Gbps operation with 200 fs RMS
random jitter (RJ). Overdrive and slew rate dispersion is
typically less than 15 ps.
A flexible power supply scheme allows either device to operate
with a single +3.3 V positive supply and a −0.2 V to +1.2 V
input signal range, or with split input/output supplies to
support a wider −0.2 V to +3.2 V input signal range and an
independent range of output levels. 50 Ω on-chip termination
Rev. PrB
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
resistors are provided at both inputs with the optional capability
to leave open (on an individual pin basis) for applications
requiring high impedance inputs.
The CML output stage is designed to directly drive 400 mV into
50 Ω transmission lines terminated to between 3.3 V to 5.2 V.
The RSPECL output stage is designed to drive 400 mV into
50 Ω terminated to V
commonly used PECL logic families. The comparator input
stage offers robust protection against large input overdrive, and
the outputs do not phase reverse when the valid input signal
range is exceeded. High speed latch and programmable
hysteresis features are also provided.
The ADCMP572/ADCMP573 are available in a 16-lead LFCSP
package.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
V
V
V
V
P
N
TN
TP
NONINVERTING
INVERTING
TERMINATION
TERMINATION
INPUT
Single-Supply Comparators
INPUT
FUNCTIONAL BLOCK DIAGRAM
HYS
ADCMP572/ADCMP573
ADCMP572
ADCMP573
© 2004 Analog Devices, Inc. All rights reserved.
CCO
V
CCI
− 2 V and is compatible with several
Figure 1.
Ultrafast 3.3 V
LE INPUT
LE INPUT
CML/
RSPECL
V
CCO
www.analog.com
Q OUTPUT
Q OUTPUT

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ADCMP572BCP Summary of contents

Page 1

Preliminary Technical Data FEATURES 3.3 V/5.2 V single-supply operation 150 ps propagation delay 15 ps overdrive and slew rate dispersion 8 GHz equivalent input risetime bandwidth 80 ps minimum pulse width 35 ps typical output rise/fall 10 ps deterministic jitter ...

Page 2

ADCMP572/ADCMP573 TABLE OF CONTENTS Electrical Characteristics ................................................................. 3 Absolute Maximum Ratings............................................................ 5 ESD Caution.................................................................................. 5 Pin Configuration and Function Descriptions............................. 6 Typical Performance Characteristics ............................................. 7 Application Information.................................................................. 9 Power/Ground Layout and Bypassing ....................................... 9 CML/RSPECL Output Stage ....................................................... 9 ...

Page 3

Preliminary Technical Data ELECTRICAL CHARACTERISTICS 3 25°C, unless otherwise noted. CCI CCO A Table 1. Parameter DC INPUT CHARACTERISTICS Input Voltage Range Input Differential Voltage Input Offset Voltage Offset Voltage Tempco Input Bias ...

Page 4

ADCMP572/ADCMP573 Parameter AC PERFORMANCE Propagation Delay Propagation Delay Tempco Prop Delay Skew—Rising Transition to Falling Transition Overdrive Dispersion Slew Rate Dispersion Pulse Width Dispersion Duty Cycle Dispersion Common-Mode Dispersion Equivalent Input Bandwidth 1 Toggle Rate Deterministic Jitter Deterministic Jitter RMS ...

Page 5

Preliminary Technical Data ABSOLUTE MAXIMUM RATINGS Table 2. Parameter SUPPLY VOLTAGES Input Supply Voltage (V to GND) CCI Output Supply Voltage (V to GND) CCO Positive Supply Differential (V − CCI CCO INPUT VOLTAGES Input Voltage Differential Input ...

Page 6

ADCMP572/ADCMP573 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 3. Pin Function Descriptions Pin No. Mnemonic Description 1 V Termination Resistor Return Pin for Noninverting Analog Input Inverting Analog Input Termination Resistor ...

Page 7

Preliminary Technical Data TYPICAL PERFORMANCE CHARACTERISTICS 3 25°C, unless otherwise noted. CCI CCO 100 150 INPUT OVERDRIVE VOLTAGE (mV) Figure 3. Propagation Delay vs. Input ...

Page 8

ADCMP572/ADCMP573 –16.2 –16.3 –16.4 –16.5 –16.6 –16.7 –16.8 –16.9 –60 –40 – TEMPERATURE (°C) Figure 9. Input Bias Current vs. Temperature Figure 10. Input Offset Voltage vs. Temperature 380 379 378 377 376 375 374 373 60 ...

Page 9

Preliminary Technical Data APPLICATION INFORMATION POWER/GROUND LAYOUT AND BYPASSING The ADCMP572/ADCMP573 comparators are very high speed SiGe devices. Consequently essential to use proper high speed design techniques to achieve the specified performance. Of critical importance is the use ...

Page 10

ADCMP572/ADCMP573 external 500 Ω resistor, and leaving the LE pin disconnected. In this case, the resistor value does not depend on the chosen V supply voltage, assuming the V pin is properly connected – CCO ...

Page 11

Preliminary Technical Data COMPARATOR HYSTERESIS The addition of hysteresis to a comparator is often desirable in a noisy environment or when the differential input amplitudes are relatively small or slow moving. The transfer function for a comparator with hysteresis is ...

Page 12

ADCMP572/ADCMP573 TYPICAL APPLICATION CIRCUITS 3. ADCMP572 LATCH INPUTS Figure 18. Zero-Crossing Detector with 3.3 V CML Outputs V = 5.2V CCI V CCO ...

Page 13

Preliminary Technical Data TIMING INFORMATION Figure 25 illustrates the ADCMP572/ADCMP573 compare and latch timing relationships. Table 4 provides definitions of the terms shown in the figure. LATCH ENABLE LATCH ENABLE DIFFERENTIAL INPUT VOLTAGE Q OUTPUT Q OUTPUT Table 4. Timing ...

Page 14

... ADCMP572/ADCMP573 OUTLINE DIMENSIONS PIN 1 INDICATOR 12° MAX 1.00 0.85 0.80 SEATING PLANE ORDERING GUIDE Model Temperature Range ADCMP572BCP −40°C to 85°C ADCMP573BCP −40°C to 85°C 3.00 0.60 MAX BSC SQ 0. 2.75 TOP VIEW BOTTOM BSC SQ VIEW 9 0.50 8 BSC 1.50 REF 0.80 MAX 0.65 TYP 0.05 MAX 0.02 NOM 0.30 0.20 REF 0.23 0.18 * COMPLIANT TO JEDEC STANDARDS MO-220-VEED-2 EXCEPT FOR EXPOSED PAD DIMENSION Figure 26 ...

Page 15

Preliminary Technical Data NOTES Rev. PrB | Page ADCMP572/ADCMP573 ...

Page 16

ADCMP572/ADCMP573 NOTES © 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PR04409–0–6/04(PrB) Preliminary Technical Data Rev. PrB | Page ...

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