CLC1018ISO8X CADEKA [Cadeka Microcircuits LLC.], CLC1018ISO8X Datasheet - Page 11

• Manufacturer Part Number: CLC1018ISO8X
• Description: 0.5mA, Low Cost, 2.5 to 5.5V, 75MHz Rail-to-Rail Amplifiers
• Manufacturer: CADEKA [Cadeka Microcircuits LLC.]

Data Sheet
Enable/Disable Function (CLC1018)
The CLC1018 offers an active-low disable pin that can be
used to lower its supply current. Leave the pin floating to
enable the part. Pull the disable pin to the negative supply
(which is ground in a single supply application) to disable
the output. During the disable condition, the nominal
supply current will drop to below 30μA and the output will
be at high impedance with about 2pF capacitance.
Power Dissipation
Power dissipation should not be a factor when operating
under the stated 1k ohm load condition. However,
applications with low impedance, DC coupled
should be analyzed to ensure that maximum allowed
junction temperature is not exceeded. Guidelines listed
below can be used to verify that the particular application
will not cause the device to operate beyond it’s intended
operating range.
Maximum power levels are set by the absolute maximum
junction rating of 150°C. To calculate the junction
temperature, the package thermal resistance value
Theta
dissipation.
Where T
In order to determine P
needs to be subtracted from the total power delivered by
the supplies.
Supply power is calculated by the standard power
equation.
Power delivered to a purely resistive load is:
The effective load resistor (Rload
the effect of the feedback network. For instance,
Rload
These measurements are basic and are relatively easy to
perform with standard lab equipment. For design purposes
©2009-2011 CADEKA Microcircuits LLC
eff
JA
Ambient
in Figure 3 would be calculated as:
(Ө
JA
T
) is used along with the total die power
Junction
P
P
is the temperature of the working environment.
load
supply
= ((V
P
V
D
supply
= T
= V
R
= P
L
D
|| (R
, the power dissipated in the load
LOAD
Ambient
supply
supply
= V
)
f
RMS
S+
+ R
× I
- P
+ (Ө
- V
2
eff
RMS supply
)/Rload
g
load
)
) will need to include
S-
JA
× P
eff
D
)
loads
however, prior knowledge of actual signal levels and load
impedance is needed to determine the dissipated power.
Here, P
Quiescent power can be derived from the specified I
values along with known supply voltage, V
power can be calculated as above with the desired signal
amplitudes using:
The dynamic power is focused primarily within the output
stage driving the load. This value can be calculated as:
Assuming the load is referenced in the middle of the
power rails or V
The CLC1008 is short circuit protected. However, this may
not guarantee that the maximum junction temperature
(+150°C) is not exceeded under all conditions. Figure 6
shows the maximum safe power dissipation in the package
vs. the ambient temperature for the packages available.
Driving Capacitive Loads
Increased phase delay at the output due to capacitive
loading can cause ringing, peaking in the frequency
response, and possible unstable behavior. Use a series
resistance, R
help improve stability and settling performance. Refer to
Figure 7.
1.5
0.5
2
1
0
-40
P
D
DYNAMIC
can be found from
MSOP-8
( I
Figure 6. Maximum Power Derating
P
-20
LOAD
D
S
SOT23-6
, between the amplifier and the load to
= P
supply
(V
= (V
)
SOIC-8
RMS
LOAD
Quiescent
Ambient Temperature (°C)
0
/2.
S+
= ( V
)
RMS
- V
LOAD
SOT23-5
+ P
20
LOAD
= V
Dynamic
)
PEAK
)
RMS
RMS
40
/ √2
× ( I
/ Rload
- P
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Load
LOAD
60
eff
Supply
)
RMS
80
. Load
11
S