TDA6650ATT NXP [NXP Semiconductors], TDA6650ATT Datasheet - Page 12

• Manufacturer Part Number: TDA6650ATT
• Description: 5 V mixer/oscillator and low noise PLL synthesizer for hybrid terrestrial tuner (digital and analog)
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
TDA6650ATT_6651ATT_2
Product data sheet
8.2 Read mode; R/W = 1
Table 12.
Data can be read from the device by setting the R/W bit to 1 (see
device address has been recognized, the device generates an acknowledge pulse and the
first data byte (status byte) is transferred on the SDA line (MSB first). Data is valid on the
SDA line during a HIGH level of the SCL clock signal.
A second data byte can be read from the device if the microcontroller generates an
acknowledge on the SDA line (master acknowledge). End of transmission will occur if no
master acknowledge occurs. The device will then release the data line to allow the
microcontroller to generate a STOP condition.
Table 13.
[1]
Table 14.
Table 15.
CP2
1
1
1
Name
Address byte 1
Status byte
Bit
A
POR
FL
AGC
A2, A1, A0
Voltage applied to pin ADC
0.6V
0.45V
MSB is transmitted first.
CC
CC
to V
to 0.6V
Charge pump current
I
Description of read data format bits
ADC levels
CC
2
CP1
0
1
1
C-bus read data format
Byte
2
CC
Description
acknowledge
power-on reset flag
in-lock flag
internal AGC flag
digital outputs of the 5-level ADC; see
POR = 0, normal operation
POR = 1, power-on reset
FL = 0, not locked
FL = 1, the PLL is locked
AGC = 0 when internal AGC is active (V
AGC = 1 when internal AGC is not active (V
Bit
MSB
1
POR
Rev. 02 — 2 February 2007
CP0
1
0
1
[1]
[1]
TDA6650ATT; TDA6651ATT
1
FL
…continued
Charge pump current
number
6
7
8
5 V mixer/oscillator and low noise PLL synthesizer
0
0
0
1
Table 15
0
AGC
AGC
A2
1
0
AGC
< V
MA1
A2
Typical current (absolute
value in A)
254
400
580
RML
> V
Table
)
RMH
MA0
A1
A1
0
1
)
© NXP B.V. 2007. All rights reserved.
13). After the
LSB
R/W = 1 A
A0
A0
0
1
12 of 54
Ack
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