LT5526 LINER [Linear Technology], LT5526 Datasheet - Page 9
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LT5526
Manufacturer Part Number
LT5526
Description
High Linearity, Low Power Downconverting Mixer
Manufacturer
LINER [Linear Technology]
Datasheet
1.LT5526.pdf
(16 pages)
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APPLICATIO S I FOR ATIO
The LT5526 consists of a double-balanced mixer, RF
buffer amplifier, high speed limiting LO buffer and
bias/enable circuits. The IC has been optimized for
downconverter applications with RF input signals to 2GHz
and LO signals to 2.5GHz. With proper matching, the IF
output can be tuned for operation at frequencies from
0.1MHz to 1GHz. Operation over a wider input frequency
range is possible, though with reduced performance.
The RF, LO and IF ports are all differential, though the LO
port is internally matched for single-ended drive (with
external DC blocking capacitors). The LT5526 is charac-
terized and production tested using single-ended LO drive.
Low side or high side LO injection can be used.
RF Input Port
Figure 3 shows a simplified schematic of the internal RF
input circuit and example external impedance matching
components for a 900MHz application. Each RF input pin
requires a low resistance DC return to ground capable of
handling 7.5mA. The DC ground can be realized using the
center-tap of an input transformer (T1), as shown, or
through matching inductors or bias chokes connected
from Pins 2 and 3 to ground.
U
U
900MHz
RF
W
IN
2
1
Figure 3. RF Input with External Matching
for 900MHz Application
1:1 6
T1
T1: LDB31900M05C-417
3
4
U
LNG = 1.25mm
LNG = 1.25mm
C1
2.7pF
Z
Z
0
0
TL1
TL2
= 80Ω
= 80Ω
A lowpass impedance matching network is used to trans-
form the differential input impedance at Pins 2 and 3 to the
optimum value for the balun output, as illustrated in
Figures 3 and 4. To assist in matching, Table 1 lists the
differential input impedance and reflection coefficient at
Pins 2 and 3 for several RF frequencies. The following
example demonstrates how to design a lowpass imped-
ance transformation network for the RF input.
From Table 1, the differential input impedance at 900MHz
is: R
divided into two halves, with one half on each side of the
31.3Ω internal load resistor, as shown in Figure 4. The
matching network consists of additional external series
inductance and a capacitor (C1) in parallel with the desired
source impedance (50Ω in this example). The external
capacitance and inductance are calculated as follows:
2
3
n = R
Q = √(n – 1) = 0.773
X
C1 = 1/(ω • X
X
X
L
RF
RF
EXT
C
L
EXT
+
–
RF
= R
= R
7.5mA
7.5mA
+ jX
= X
= X
S
/R
S
RF
/Q = 64.7Ω
EXT
L
RF
RF
• Q = 24.2Ω
– X
= 50/31.3 = 1.597
/ω = 2.79nH
= 31.3 + j8.41Ω. The 8.41Ω reactance is
C
V
RF
LT5526
BIAS
) = 2.74pF
5526 F03
= 15.8Ω
LT5526
9
5526f