ADL5315ACPZ-WP AD [Analog Devices], ADL5315ACPZ-WP Datasheet - Page 14

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ADL5315ACPZ-WP

Manufacturer Part Number
ADL5315ACPZ-WP
Description
Precision Wide Range (3 nA to 3 mA) High-Side Current Mirror
Manufacturer
AD [Analog Devices]
Datasheet
ADL5315
Figure 28 and Figure 29 show the performance of the circuit in
Figure 27. The reverse bias across the photodiode is held at a
low value for small input currents to minimize dark current.
The V
currents to maintain accurate photodiode responsivity. The
minimum bias level for the configuration above is ~200 mV.
SET
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
100p
0
0
voltage increases in a linear manner at the higher input
0
RLIM Is Configured for Automatic Photodiode Biasing
RLIM Is Configured for Automatic Photodiode Biasing
1
1n
Figure 28. V
Figure 29. V
2
10n
3
100n
SET
SET
4
Voltage vs. I
Voltage vs. I
I
INPT
I
INPT
5
(mA)
(A)
6
10μ
INPT
INPT
when
when
7
100μ
8
1m
9
10m
10
Rev. 0 | Page 14 of 20
CHARACTERIZATION METHODS
During characterization, the ADL5315 was treated as a
precision 1:1 current mirror. To make accurate measurements
throughout the six-decade current range, calibrated Keithley
236 current sources were used to create and measure the test
currents. Measurements at low currents are very susceptible to
leakage to the ground plane. To minimize leakage on the
characterization board, the VSET pin is connected to traces that
buffer V
triax guard connector to provide buffering along the cabling.
The primary characterization setup shown in Figure 30 is used
to perform all static measurements, including mirror linearity
between I
I
board is similar to that of the evaluation board, except that triax
connectors are used instead of SMA. To measure pulse response,
noise, and small signal bandwidth, more specialized test setups
are used.
The setup in Figure 31 is used to measure the output current
noise of the ADL5315. Batteries are used in numerous places to
minimize introduced noise and remove the uncertainty
resulting from the use of multiple dc supplies. In application,
properly bypassed dc supplies provide similar results. The load
resistor is chosen for each current to maximize signal-to-noise
ratio while maintaining measurement system bandwidth (when
combined with the low capacitance JFET buffer). The custom
LNA is used to overcome noise floor limitations in the
HP89410A signal analyzer.
INPT
current limiting. Component selection of the characterization
INPT
CHARACTERIZATION BOARD
INPT
VPOS VSET SREF COMM
from ground. These traces are connected to the
and I
DC SUPPLIES/DMM
Figure 30. Primary Characterization Setup
ADL5315
OUT
, V
INPT
variation vs. I
IOUT
INPT
INPT
KEITHLEY 236
KEITHLEY 236
, supply current, and

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