ADL5315ACPZ-WP AD [Analog Devices], ADL5315ACPZ-WP Datasheet - Page 10

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ADL5315ACPZ-WP

Manufacturer Part Number
ADL5315ACPZ-WP
Description
Precision Wide Range (3 nA to 3 mA) High-Side Current Mirror
Manufacturer
AD [Analog Devices]
Datasheet
ADL5315
The VSET control is intended primarily to provide a dc bias
voltage for the mirror input, but it is also well behaved in the
presence of the V
independent of input current because the mirror is capable of
sourcing large currents to pull up the INPT pin. The fall time,
however, is inversely proportional to I
available to discharge the input compensation capacitor and
other parasitics (see Figure 11). The mirror output current can
vary significantly from zero to several milliamps until V
fully settled.
NOISE PERFORMANCE
The noise performance for the ADL5315, defined as the rms
noise current as a fraction of the output dc current, generally
improves with increasing signal current. This partially results
from the relationship between the quiescent collector current
and the shot noise in the bipolar transistors. At lower signal
current levels, the noise contribution from the JFET amplifier
and other voltage noise sources appearing at INPT contribute
significantly to the current noise. Filtering noise at VSET,
whether provided by SREF or generated externally, as well as
selecting optimal external compensation components on INPT,
minimizes the amount of current noise at IOUT generated by
the voltage noise at INPT.
SET
transients. The rise time of V
INPT
because only I
INPT
is largely
INPT
INPT
is
is
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MIRROR RESPONSE TIME
The response time of I
function of input current, with small-signal bandwidth increasing
roughly in proportion to I
external compensating capacitor on INPT strongly affects the
I
in the Bias Control Interface section), although the value must
be chosen to maintain stability and prevent noise peaking.
INPUT CURRENT LIMITING
The ADL5315 provides a resistor-programmable input current
limit with a fixed maximum of 16 mA for the RLIM pin tied to
VPOS. The fixed maximum provides input short-circuit protection
to ground. The current limit is defined as the current that forces
V
Resistor R
current limit according to
over an R
to 1 mA. Larger values of R
1 mA (down to approximately 250 μA) with some degradation
in accuracy. See Figure 14 for more performance detail.
OUT
INPT
response time (as well as the V
I
to 0 V (when using a current source on the INPT pin).
LIM
LIM
=
LIM
R
range of 0 to 45 kΩ, corresponding to 16 mA down
between the VPOS and RLIM pins controls the
LIM
48
+
V
3
OUT
to changes in I
INPT
LIM
(see Figure 10). The value of the
can be used for currents below
SET
to V
INPT
INPT
is fundamentally a
fall time, as noted

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