HD6475328-CP10 HITACHI [Hitachi Semiconductor], HD6475328-CP10 Datasheet - Page 67

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HD6475328-CP10

Manufacturer Part Number
HD6475328-CP10
Description
original Hitachi CMOS microcomputer unit (MCU)
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
Table 3-8 Effective Address Calculation (cont)
No.
5
6
7
Notes: * 1 The page register is ignored in minimum mode.
Addressing Mode Effective Address Calculation
Absolute address
@aa:8
0000Sz101
@aa:16
0001Sz101
Immediate
#xx:8
00000100
#xx:16
00001100
PC-relative
disp:8
No EA code
Specified in OP code
disp:16
No EA code
Specified in OP code
* 2 The page register used in addressing modes 2, 3, and 4 depends on the general register :
* 3 Decrement by –1 for a byte operand, and by –2 for a word operand.
* 4 The pre-decrement or post-increment is always ±2 when R7 is specified, even if the
* 5 The drawing below shows what happens when the @-SP and @ SP+ addressing
DP for R0, R1, R2, or R3; EP for R4 or R5; TP for R6 or R7.
operand is byte size.
modes are used to save and restore the stack pointer.
8 Bits
15
15
16 Bits
15
15
Displacement with
sign extension
Displacement
PC
PC
0
0
0
0
48
Effective Address
23
23
Operand is 1-byte EA
extension data.
Operand is 2-byte EA
extension data.
23
23
CP
CP
H'00
DP
*1
*1
15
EA extension data
15
15
15
EA extension data
BR
Result
Result
0
0
0
0

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