PEF22554 INFINEON [Infineon Technologies AG], PEF22554 Datasheet - Page 7

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PEF22554

Manufacturer Part Number
PEF22554
Description
Quad E1/T1/J1 Framer and Line Interface Component for Long and Short Haul Applications
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet

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1.7
Table 1
VSEL
V
V
V
A short pin list of the BGA package is given in
refer to the QuadFALC
Table 2
Ball No.
BGA
N12
M12
L13
L12
L14
L11
K13
K14
Delta Sheet
DDC
DDP
SSP
Pin No.
TQFP
74
75
76
77
78
79
80
81
Pin Description
I + PU
S
S
S
Additional Pin Functions
BGA Pin Assignment
Voltage Select
Enables the internal voltage regulator for 3.3 V-only operation
mode if connected to V
Disables the internal voltage regulator for dual power supply mode
if connected to V
Positive Power Supply
for the digital core (1.8 V)
These pins can either be positive power supply input or output
depending on the VSEL input condition.
If the VSEL pin is connected to V
must both be connected to the same 1.8 V power supply and
require decoupling.
If the VSEL pin is connected to V
1.8 V power supply outputs and must be decoupled to V
Attention: These pins must not be used to supply external
Positive Power Supply for the analog PLL (3.3 V)
Power Supply Ground for the analog PLL (0 V)
Symbol
A0
A1
A2
A3
A4
A5
A6
A7
®
V2.1 Preliminary Data Sheet.
devices.
Input(I)
Output(O)
Supply(S)
I + PU
I + PU
I + PU
I + PU
I + PU
I + PU
I + PU
I + PU
SS
.
7/30
DD
Table
(recommended) or left open.
Function
Address Bus
Address Bus
Address Bus
Address Bus
Address Bus
Address Bus
Address Bus
Address Bus
2. For a complete signal description
DD
SS
(3.3 V), these pins will both be
, these pins are inputs and
QuadFALC
PEF 22554
2002-09-16
Overview
SS
.
®

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